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https://github.com/ROCm/composable_kernel.git
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Add instances for conv_scale with fp8 in/out (#1193)
* Add fp8 conv instances and client example * Format * Add example * Update cmakelists * Add profiler mode * Format * Fix copyright headers
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@@ -6,6 +6,7 @@ foreach(gpu IN LISTS GPU_TARGETS)
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add_example_executable(example_convnd_fwd_xdl_fp16 convnd_fwd_xdl_fp16.cpp)
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add_example_executable(example_convnd_fwd_xdl_bf16 convnd_fwd_xdl_bf16.cpp)
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add_example_executable(example_convnd_fwd_xdl_int8 convnd_fwd_xdl_int8.cpp)
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add_example_executable(example_convnd_fwd_xdl_fp8 convnd_fwd_xdl_fp8.cpp)
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# FIXME: re-enable this exampe as test when SWDEV-335738 is fixed
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add_example_executable_no_testing(example_convnd_fwd_xdl_fp64 convnd_fwd_xdl_fp64.cpp)
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set(target 1)
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@@ -1,5 +1,5 @@
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// SPDX-License-Identifier: MIT
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// Copyright (c) 2018-2023, Advanced Micro Devices, Inc. All rights reserved.
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// Copyright (c) 2018-2024, Advanced Micro Devices, Inc. All rights reserved.
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#include <cstdlib>
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#include <iostream>
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@@ -27,6 +27,88 @@ void print_helper_msg()
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<< ck::utils::conv::get_conv_param_parser_helper_msg() << std::endl;
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}
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template <typename DataType>
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inline __host__ __device__ constexpr double get_rtol()
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{
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if constexpr(std::is_same_v<DataType, float>)
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{
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return 1e-3;
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}
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else if constexpr(std::is_same_v<DataType, double>)
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{
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return 1e-6;
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}
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else if constexpr(std::is_same_v<DataType, ck::half_t>)
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{
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return 1e-3;
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}
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else if constexpr(std::is_same_v<DataType, ck::bhalf_t>)
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{
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return 5e-2;
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}
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else if constexpr(std::is_same_v<DataType, int32_t>)
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{
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return 1e-1;
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}
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else if constexpr(std::is_same_v<DataType, int8_t>)
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{
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return 1e-1;
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}
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else if constexpr(std::is_same_v<DataType, ck::f8_t>)
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{
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return 1e-1; // 240 and 224 are acceptable
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}
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else if constexpr(std::is_same_v<DataType, ck::bf8_t>)
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{
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return 1.5e-1; // 57344 and 49152 are acceptable
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}
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else
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{
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return 1e-3;
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}
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}
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template <typename DataType>
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inline __host__ __device__ constexpr double get_atol()
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{
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if constexpr(std::is_same_v<DataType, float>)
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{
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return 1e-3;
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}
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else if constexpr(std::is_same_v<DataType, double>)
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{
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return 1e-6;
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}
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else if constexpr(std::is_same_v<DataType, ck::half_t>)
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{
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return 1e-3;
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}
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else if constexpr(std::is_same_v<DataType, ck::bhalf_t>)
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{
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return 5e-2;
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}
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else if constexpr(std::is_same_v<DataType, int32_t>)
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{
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return 1e-1;
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}
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else if constexpr(std::is_same_v<DataType, int8_t>)
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{
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return 1e-1;
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}
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else if constexpr(std::is_same_v<DataType, ck::f8_t>)
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{
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return 16.1; // 240 and 224 are acceptable
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}
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else if constexpr(std::is_same_v<DataType, ck::bf8_t>)
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{
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return 8192.1; // 57344 and 49152 are acceptable
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}
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else
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{
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return 1e-3;
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}
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}
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template <ck::index_t NDimSpatial,
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typename InDataType,
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typename WeiDataType,
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@@ -164,8 +246,11 @@ bool run_grouped_conv_fwd(bool do_verification,
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out_device_buf.FromDevice(out_device.mData.data());
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return ck::utils::check_err(
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out_device, out_host, "Error: incorrect results!", 1e-5f, 1e-4f);
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return ck::utils::check_err(out_device,
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out_host,
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"Error: incorrect results!",
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get_rtol<OutDataType>(),
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get_atol<OutDataType>());
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}
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return true;
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81
example/09_convnd_fwd/convnd_fwd_xdl_fp8.cpp
Normal file
81
example/09_convnd_fwd/convnd_fwd_xdl_fp8.cpp
Normal file
@@ -0,0 +1,81 @@
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// SPDX-License-Identifier: MIT
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// Copyright (c) 2024, Advanced Micro Devices, Inc. All rights reserved.
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#include "convnd_fwd_common.hpp"
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#include "ck/tensor_operation/gpu/device/impl/device_grouped_conv_fwd_multiple_abd_xdl_cshuffle.hpp"
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#include "ck/library/utility/convolution_host_tensor_descriptor_helper.hpp"
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using InDataType = ck::f8_t;
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using WeiDataType = ck::f8_t;
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using AccDataType = float;
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using CShuffleDataType = ck::f8_t;
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using OutDataType = ck::f8_t;
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using ComputeDataType = ck::f8_t;
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template <ck::index_t... Is>
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using S = ck::Sequence<Is...>;
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using InElementOp = ck::tensor_operation::element_wise::PassThrough;
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using WeiElementOp = ck::tensor_operation::element_wise::PassThrough;
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using OutElementOp = ck::tensor_operation::element_wise::PassThrough;
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static constexpr auto ConvSpec =
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ck::tensor_operation::device::ConvolutionForwardSpecialization::Default;
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static constexpr auto GemmSpec = ck::tensor_operation::device::GemmSpecialization::MNKPadding;
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template <ck::index_t NDimSpatial, typename InLayout, typename WeiLayout, typename OutLayout>
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using DeviceGroupedConvNDFwdInstance =
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ck::tensor_operation::device::DeviceGroupedConvFwdMultipleABD_Xdl_CShuffle<
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NDimSpatial,
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InLayout,
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WeiLayout,
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ck::Tuple<>,
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OutLayout,
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InDataType,
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WeiDataType,
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AccDataType,
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CShuffleDataType,
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ck::Tuple<>,
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OutDataType,
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InElementOp,
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WeiElementOp,
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OutElementOp,
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ConvSpec, // ConvForwardSpecialization
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GemmSpec, // GemmSpecialization
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1, //
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256, // BlockSize
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128, // MPerBlock
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256, // NPerBlock
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32, // KPerBlock
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8, // AK1
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8, // BK1
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32, // MPerXdl
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32, // NPerXdl
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2, // MXdlPerWave
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4, // NXdlPerWave
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S<4, 64, 1>, // ABlockTransferThreadClusterLengths_AK0_M_AK1
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S<1, 0, 2>, // ABlockTransferThreadClusterArrangeOrder
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S<1, 0, 2>, // ABlockTransferSrcAccessOrder
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2, // ABlockTransferSrcVectorDim
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8, // ABlockTransferSrcScalarPerVector
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8, // ABlockTransferDstScalarPerVector_AK1
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1, // ABlockLdsExtraM
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S<4, 64, 1>, // BBlockTransferThreadClusterLengths_BK0_N_BK1
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S<1, 0, 2>, // BBlockTransferThreadClusterArrangeOrder
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S<1, 0, 2>, // BBlockTransferSrcAccessOrder
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2, // BBlockTransferSrcVectorDim
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8, // BBlockTransferSrcScalarPerVector
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8, // BBlockTransferDstScalarPerVector_BK1
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1, // BBlockLdsExtraN
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1,
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1,
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S<1, 32, 1, 8>,
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8,
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ComputeDataType>;
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#include "run_convnd_fwd_example.inc"
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int main(int argc, char* argv[]) { return run_convnd_fwd_example(argc, argv) ? 0 : 1; }
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