mirror of
https://github.com/ROCm/composable_kernel.git
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22de6a19d9
[CK_BUILDER] ck builder conv transfer fix ## Motivation This PR fixes how CK Builder is validating transfer vector size and adds proper validation for LDS transfer vector size as well. ## Changes: * [__source vector dim__] -- Before this PR the data transfer validation logic didn't allow to set the source vectorized dimension to 1. However there are CK instances that are doing this when the group merging is used. This is used only for `DeviceGroupedConvFwdMultipleABD_Xdl_CShuffle` kernel. * [__valid vector size__] -- Before this PR the validation logic concerned only single instruction maximum vector size. However our buffer loading logic has implemented support for loading more values through multiple buffer instructions. This again was discovered to be used in some of the convolution instances. Thus this behavior was reflected in validation logic. * [__valid LDS vector size__] -- Before this PR the LDS vector size validation was done in the same way as VMEM. This PR adds proper LDS vector size validation based on the available LDS instruction sizes. ## Test Plan Run CK BUILDER conv fwd factories tests ## Test Result All CK BUILDER conv fwd factories work (except DL one & ck tile since they're not yet added now) ## Submission Checklist - [ ] Look over the contributing guidelines at https://github.com/ROCm/ROCm/blob/develop/CONTRIBUTING.md#pull-requests.
581 lines
29 KiB
C++
581 lines
29 KiB
C++
// Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
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// SPDX-License-Identifier: MIT
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#include <gtest/gtest.h>
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#include <gmock/gmock.h>
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#include "ck_tile/builder/conv_builder.hpp"
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#include "ck_tile/builder/reflect/conv_description.hpp"
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#include "ck_tile/builder/reflect/conv_describe.hpp"
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#include "testing_utils.hpp"
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#include "impl/conv_signature_types.hpp"
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#include "impl/conv_algorithm_types.hpp"
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#include "ck_tile/builder/conv_signature_utils.hpp"
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namespace {
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namespace ckb = ck_tile::builder;
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namespace ckr = ck_tile::reflect;
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namespace ckt = ck_tile::test;
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struct TensorOp
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{
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ckb::ElementwiseOperation elementwise_operation{ckb::ElementwiseOperation::PASS_THROUGH};
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};
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struct InvalidTensorOp
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{
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int elementwise_operation = 7; // invalid value
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};
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static_assert(!ckb::TensorOperatorDescriptor<InvalidTensorOp>);
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struct TensorConfig
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{
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ckb::TensorLayout layout;
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ckb::DataType data_type{ckb::DataType::UNDEFINED_DATA_TYPE};
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ckb::DataType compute_type{ckb::DataType::UNDEFINED_DATA_TYPE};
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};
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struct TensorConfigNoDataType
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{
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ckb::TensorLayout layout;
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ckb::DataType compute_type{ckb::DataType::UNDEFINED_DATA_TYPE};
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};
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struct ConvTensorNoDataType
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{
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TensorConfigNoDataType config;
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TensorOp operation{};
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};
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struct ConvTensorSimple
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{
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TensorConfig config;
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};
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struct ConvTensorWithOp
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{
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TensorConfig config;
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TensorOp operation{};
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};
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struct ConvTensorWithInvalidOp
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{
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TensorConfig config;
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InvalidTensorOp operation{};
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};
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// Defines the signature of the convolution operation to be tested.
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// This includes dimensionality, direction, data layout, and data type.
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struct ConvSignature
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{
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using enum ckb::DataType;
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using enum ckb::TensorLayout;
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int spatial_dim = 2;
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ckb::DataType data_type = FP16;
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ckb::DataType accumulation_data_type = FP32;
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ConvTensorSimple input = {.config = {GNHWC}};
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ConvTensorSimple weight = {.config = {GKYXC}};
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ConvTensorSimple output = {.config = {GNHWK}};
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};
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static_assert(ckb::ConvSignatureDescriptor<ConvSignature>);
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// Compile time tests for concepts
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struct ConvSignatureWithOptionalParams
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{
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using enum ckb::DataType;
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using enum ckb::TensorLayout;
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using enum ckb::ConvDirection;
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using enum ckb::ElementwiseOperation;
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int spatial_dim = 2;
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ckb::DataType data_type = FP16;
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ckb::DataType accumulation_data_type = FP32;
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ckb::ConvDirection direction = FORWARD;
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ConvTensorWithOp input = {
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.config = {GNHWC, FP16},
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};
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ConvTensorWithOp weight = {.config = {GKYXC, FP16}};
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ConvTensorWithOp output = {.config = {GNHWK, FP16}, .operation = {SCALE}};
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};
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static_assert(ckb::ConvSignatureDescriptor<ConvSignatureWithOptionalParams>);
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struct ConvSignatureWithInvalidOptionalParams
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{
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using enum ckb::DataType;
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using enum ckb::TensorLayout;
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int spatial_dim = 2;
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ckb::DataType data_type = FP16;
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ckb::DataType accumulation_data_type = FP32;
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ConvTensorWithInvalidOp input = {.config = {GNHWC}};
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ConvTensorWithInvalidOp weight = {.config = {GKYXC}};
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ConvTensorWithInvalidOp output = {.config = {GNHWK}};
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};
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static_assert(!ckb::ConvSignatureDescriptor<ConvSignatureWithInvalidOptionalParams>);
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struct DefaultAlgorithm
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{
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ckb::test::ThreadBlock thread_block{.block_size = 256,
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.tile_size = {.m = 256, .n = 256, .k = 32}};
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ckb::test::GridwiseFwdXdlGemm gridwise_gemm{
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.ak1 = 8,
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.bk1 = 8,
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.xdl_params = {.m_per_xdl = 16, .n_per_xdl = 16, .m_xdl_per_wave = 8, .n_xdl_per_wave = 8}};
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ckb::test::Transfer<> transfer{
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.a =
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{
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.block_transfer = {.k0 = 1, .m_n = 128, .k1 = 2},
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.lds_transfer = {.src_vector_dim = 2,
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.src_scalar_per_vector = 2,
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.lds_dst_scalar_per_vector = 2,
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.is_direct_load = false,
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.lds_padding = false},
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.thread_cluster_arrange_order = {.order = {0, 1, 2}},
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.src_access_order = {.order = {0, 1, 2}},
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},
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.b =
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{
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.block_transfer = {.k0 = 1, .m_n = 128, .k1 = 2},
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.lds_transfer = {.src_vector_dim = 2,
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.src_scalar_per_vector = 2,
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.lds_dst_scalar_per_vector = 2,
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.is_direct_load = false,
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.lds_padding = false},
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.thread_cluster_arrange_order = {.order = {0, 1, 2}},
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.src_access_order = {.order = {0, 1, 2}},
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},
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.c =
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{
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.thread_cluster_dims =
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{.m_block = 1, .m_wave_per_xdl = 32, .n_block = 1, .n_wave_per_xdl = 8},
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.epilogue = {.m_xdl_per_wave_per_shuffle = 1,
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.n_xdl_per_wave_per_shuffle = 1,
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.scalar_per_vector = 2},
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},
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};
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ckb::ConvSpecialization fwd_specialization = ckb::ConvSpecialization::DEFAULT;
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ckb::GemmSpecialization gemm_specialization = ckb::GemmSpecialization::Default;
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ckb::test::BlockGemmPipeline block_gemm_pipeline{.pipeline_version = ckb::PipelineVersion::V4,
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.scheduler =
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ckb::PipelineScheduler::INTRAWAVE};
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size_t num_conv_groups_to_merge = 1;
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};
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static_assert(ckb::ConvAlgorithmDescriptor<DefaultAlgorithm>);
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struct ConvSignatureUtilsTest1
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{
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using enum ckb::DataType;
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using enum ckb::TensorLayout;
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using enum ckb::ConvDirection;
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using enum ckb::ElementwiseOperation;
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int spatial_dim = 2;
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ckb::DataType data_type = FP16;
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ckb::DataType accumulation_data_type = FP32;
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ckb::ConvDirection direction = FORWARD;
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ConvTensorWithOp input = {
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.config = {GNHWC, FP16},
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};
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ConvTensorWithOp weight = {.config = {GKYXC, FP16}};
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ConvTensorWithOp output = {.config = {GNHWK, UNDEFINED_DATA_TYPE}, .operation = {SCALE}};
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};
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static_assert(ckb::ConvSignatureDescriptor<ConvSignatureUtilsTest1>);
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struct ConvSignatureUtilsTest2
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{
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using enum ckb::DataType;
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using enum ckb::TensorLayout;
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using enum ckb::ConvDirection;
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using enum ckb::ElementwiseOperation;
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int spatial_dim = 2;
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ckb::DataType data_type = FP16;
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ckb::ElementwiseOperation elementwise_operation = CONV_INVSCALE;
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ckb::DataType accumulation_data_type = FP32;
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ckb::ConvDirection direction = FORWARD;
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ConvTensorSimple input = {
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.config = {GNHWC, FP16},
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};
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ConvTensorNoDataType weight = {.config = {GKYXC}, .operation = {POWER}};
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ConvTensorWithOp output = {.config = {GNHWK, BF16}, .operation = {GELU}};
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};
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static_assert(ckb::ConvSignatureDescriptor<ConvSignatureUtilsTest2>);
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TEST(ConvUtilsTest, getDataType1)
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{
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using enum ckb::DataType;
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static constexpr const ConvSignatureUtilsTest1 SIGNATURE;
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EXPECT_THAT(ckb::getInputDataType<SIGNATURE>(), FP16);
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EXPECT_THAT(ckb::getWeightDataType<SIGNATURE>(), FP16);
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EXPECT_THAT(ckb::getOutputDataType<SIGNATURE>(), FP16);
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EXPECT_THAT(ckb::getDataTypeIfCommon<SIGNATURE>(), FP16);
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}
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TEST(ConvUtilsTest, getDataType2)
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{
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using enum ckb::DataType;
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static constexpr const ConvSignatureUtilsTest2 SIGNATURE;
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EXPECT_THAT(ckb::getInputDataType<SIGNATURE>(), FP16);
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EXPECT_THAT(ckb::getWeightDataType<SIGNATURE>(), FP16);
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EXPECT_THAT(ckb::getOutputDataType<SIGNATURE>(), BF16);
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EXPECT_THAT(ckb::getDataTypeIfCommon<SIGNATURE>(), UNDEFINED_DATA_TYPE);
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}
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TEST(ConvUtilsTest, getElementwiseOperation1)
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{
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using enum ckb::ElementwiseOperation;
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static constexpr const ConvSignatureUtilsTest1 SIGNATURE;
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EXPECT_THAT(ckb::getInputElementwiseOperation<SIGNATURE>(), PASS_THROUGH);
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EXPECT_THAT(ckb::getWeightElementwiseOperation<SIGNATURE>(), PASS_THROUGH);
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EXPECT_THAT(ckb::getOutputElementwiseOperation<SIGNATURE>(), SCALE);
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}
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TEST(ConvUtilsTest, getElementwiseOperation2)
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{
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using enum ckb::ElementwiseOperation;
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static constexpr const ConvSignatureUtilsTest2 SIGNATURE;
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EXPECT_THAT(ckb::getInputElementwiseOperation<SIGNATURE>(), CONV_INVSCALE);
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EXPECT_THAT(ckb::getWeightElementwiseOperation<SIGNATURE>(), POWER);
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EXPECT_THAT(ckb::getOutputElementwiseOperation<SIGNATURE>(), GELU);
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}
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TEST(ConvDescriptionTest, DefaultInstanceHasBriefDescription)
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{
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static constexpr const ConvSignature SIGNATURE;
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static constexpr const DefaultAlgorithm ALGORITHM;
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using Instance = ckb::ConvBuilder<SIGNATURE, ALGORITHM>::Instance;
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EXPECT_THAT(ckr::describe<Instance>().brief(), ckt::StringEqWithDiff("2D Forward convolution"));
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}
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TEST(ConvDescriptionTest, DefaultInstanceHasDetailedDescription)
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{
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static constexpr const ConvSignature SIGNATURE;
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static constexpr const DefaultAlgorithm ALGORITHM;
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using Instance = ckb::ConvBuilder<SIGNATURE, ALGORITHM>::Instance;
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EXPECT_THAT(
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ckr::describe<Instance>().detailed(),
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ckt::StringEqWithDiff( //
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"2D Forward Convolution Kernel\n"
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"├─ Signature\n"
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"│ ├─ Tensor Type: FP16\n"
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"│ ├─ Input Layout: GNHWC\n"
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"│ ├─ Weight Layout: GKYXC\n"
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"│ ├─ Output Layout: GNHWK\n"
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"│ ├─ Input elementwise operation: PASS_THROUGH\n"
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"│ ├─ Weights elementwise operation: PASS_THROUGH\n"
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"│ └─ Output elementwise operation: PASS_THROUGH\n"
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"└─ Algorithm\n"
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" ├─ Thread block size: 256\n"
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" ├─ Data tile size: 256×256×32\n"
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" ├─ Gemm padding: DEFAULT\n"
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" ├─ Convolution specialization: DEFAULT\n"
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" ├─ Pipeline version: V4\n"
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" ├─ Pipeline scheduler: INTRAWAVE\n"
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" ├─ Warp Gemm parameters: \n"
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" │ ├─ subtile size: 16×16\n"
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" │ └─ Number of warp gemm iterations: 8×8\n"
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" ├─ Memory access:\n"
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" │ ├─ A Tile transfer: \n"
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" │ │ ├─ Tile dimensions: 4×256×8×\n"
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" │ │ ├─ The innermost K subdimension size: 8\n"
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" │ │ ├─ Spatial thread distribution over the data tile: 0×1×2\n"
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" │ │ ├─ The order of accessing data tile axes: 0×1×2\n"
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" │ │ ├─ Vectorized memory access axis index (with contiguous memory): 2\n"
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" │ │ ├─ Vector access (GMEM read) instruction size: 2\n"
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" │ │ ├─ Vector access (LDS write) instruction size: 2\n"
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" │ │ └─ LDS data layout padding (to prevent bank conflicts): 2\n"
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" │ ├─ B Tile transfer: \n"
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" │ │ ├─ Tile dimensions: 4×256×8×\n"
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" │ │ ├─ The innermost K subdimension size: 8\n"
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" │ │ ├─ Spatial thread distribution over the data tile: 0×1×2\n"
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" │ │ ├─ The order of accessing data tile axes: 0×1×2\n"
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" │ │ ├─ Vectorized memory access axis index (with contiguous memory): 2\n"
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" │ │ ├─ Vector access (GMEM read) instruction size: 2\n"
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" │ │ ├─ Vector access (LDS write) instruction size: 2\n"
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" │ │ └─ LDS data layout padding (to prevent bank conflicts): 2\n"
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" │ └─ C Tile transfer: \n"
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" │ ├─ Data shuffle (number of gemm instructions per iteration): 1×1\n"
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" │ ├─ Spatial thread distribution used to store data: 1×32×1×8\n"
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" │ └─ Vector access (GMEM write) instruction size: 2\n"
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" ├─ Struct does not contain optional num_gemm_k_prefetch_stage parameter\n"
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" ├─ Struct does not contain optional max_transpose_transfer_src_scalar_per_vector "
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"parameter\n"
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" ├─ Struct does not contain optional max_transpose_transfer_dst_scalar_per_vector "
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"parameter\n"
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" └─ Struct does not contain optional num_groups_to_merge parameter"));
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}
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// Test printing of optional parameters num_groups_to_merge,
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// max_transpose_transfer_src_scalar_per_vector and max_transpose_transfer_dst_scalar_per_vector
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TEST(ConvDescriptionTest, BwdWeightTwoStageWmmaV3DescriptionTest)
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{
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using Instance =
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ck::tensor_operation::device::DeviceGroupedConvBwdWeightTwoStage_Wmma_CShuffleV3<
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2, // NDimSpatial
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ck::tensor_layout::convolution::GNHWC, // InLayout
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ck::tensor_layout::convolution::GKYXC, // WeiLayout
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ck::tensor_layout::convolution::GNHWK, // OutLayout
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ck::half_t, // InDataType
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ck::half_t, // WeiDataType
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ck::half_t, // OutDataType
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float, // AccDataType
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ck::tensor_operation::element_wise::PassThrough, // InElementwiseOperation
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ck::tensor_operation::element_wise::PassThrough, // WeiElementwiseOperation
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ck::tensor_operation::element_wise::PassThrough, // OutElementwiseOperation
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ck::tensor_operation::device::ConvolutionBackwardWeightSpecialization::
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Default, // ConvBackwardWeightSpecialization
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256, // BlockSize
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128, // MPerBlock
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128, // NPerBlock
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16, // K0PerBlock
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8, // AK1
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32, // MPerWMMA
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32, // NPerXDL
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4, // MRepeat
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4, // NRepeat
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ck::Sequence<4, 64, 1>, // ABlockTransferThreadClusterLengths_AK0_M_AK1
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ck::Sequence<1, 0, 2>, // ABlockTransferThreadClusterArrangeOrder_
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ck::Sequence<1, 0, 2>, // ABlockTransferSrcAccessOrder
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2, // ABlockTransferSrcVectorDim
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8, // ABlockTransferSrcScalarPerVector
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8, // ABlockTransferDstScalarPerVector_K1
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1, // ABlockLdsAddExtraM
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ck::Sequence<4, 64, 1>, // BBlockTransferThreadClusterLengths_BK0_N_BK1
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ck::Sequence<1, 0, 2>, // BBlockTransferThreadClusterArrangeOrder_
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ck::Sequence<1, 0, 2>, // BBlockTransferSrcAccessOrder_
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2, // BBlockTransferSrcVectorDim
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8, // BBlockTransferSrcScalarPerVector
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8, // BBlockTransferDstScalarPerVector_K1
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1, // BBlockLdsAddExtraN
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1, // CShuffleMXdlPerWavePerShuffle
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1, // CShuffleNXdlPerWavePerShuffle
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ck::Sequence<1,
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32,
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1,
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8>, // CBlockTransferClusterLengths_MBlock_MPerBlock_NBlock_NPerBlock_
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8, // CDEBlockTransferScalarPerVector_NPerBlock_
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ck::BlockGemmPipelineScheduler::Intrawave, // BlkGemmPipeSched
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ck::BlockGemmPipelineVersion::v1, // BlkGemmPipelineVer
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4, // NumGroupsToMerge
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ck::half_t, // AComputeDataType
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ck::half_t, // BComputeDataType
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1, // MaxTransposeTransferSrcScalarPerVector
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1>; // MaxTransposeTransferDstScalarPerVector>
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EXPECT_THAT(ckr::describe<Instance>().detailed(),
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ckt::StringEqWithDiff( //
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"2D Backward Weight Convolution Kernel\n"
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"├─ Signature\n"
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"│ ├─ Tensor Type: FP16\n"
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"│ ├─ Input Layout: GNHWC\n"
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"│ ├─ Weight Layout: GKYXC\n"
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"│ ├─ Output Layout: GNHWK\n"
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"│ ├─ Input elementwise operation: PASS_THROUGH\n"
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"│ ├─ Weights elementwise operation: PASS_THROUGH\n"
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"│ └─ Output elementwise operation: PASS_THROUGH\n"
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"└─ Algorithm\n"
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" ├─ Thread block size: 256\n"
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" ├─ Data tile size: 128×128×16\n"
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" ├─ Struct does not contain optional gemm_padding argument\n"
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" ├─ Convolution specialization: DEFAULT\n"
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" ├─ Pipeline version: V1\n"
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" ├─ Pipeline scheduler: DEFAULT\n"
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" ├─ Warp Gemm parameters: \n"
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" │ ├─ subtile size: 32×32\n"
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" │ └─ Number of warp gemm iterations: 4×4\n"
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" ├─ Memory access:\n"
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" │ ├─ A Tile transfer: \n"
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" │ │ ├─ Tile dimensions: 2×128×8×\n"
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" │ │ ├─ The innermost K subdimension size: 8\n"
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" │ │ ├─ Spatial thread distribution over the data tile: 1×0×2\n"
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" │ │ ├─ The order of accessing data tile axes: 1×0×2\n"
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" │ │ ├─ Vectorized memory access axis index (with contiguous memory): 2\n"
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" │ │ ├─ Vector access (GMEM read) instruction size: 8\n"
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" │ │ ├─ Vector access (LDS write) instruction size: 8\n"
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" │ │ └─ LDS data layout padding (to prevent bank conflicts): 8\n"
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" │ ├─ B Tile transfer: \n"
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" │ │ ├─ Tile dimensions: 2×128×8×\n"
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" │ │ ├─ The innermost K subdimension size: 8\n"
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" │ │ ├─ Spatial thread distribution over the data tile: 1×0×2\n"
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" │ │ ├─ The order of accessing data tile axes: 1×0×2\n"
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" │ │ ├─ Vectorized memory access axis index (with contiguous memory): 2\n"
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" │ │ ├─ Vector access (GMEM read) instruction size: 8\n"
|
||
" │ │ ├─ Vector access (LDS write) instruction size: 8\n"
|
||
" │ │ └─ LDS data layout padding (to prevent bank conflicts): 8\n"
|
||
" │ └─ C Tile transfer: \n"
|
||
" │ ├─ Data shuffle (number of gemm instructions per iteration): 1×1\n"
|
||
" │ ├─ Spatial thread distribution used to store data: 1×32×1×8\n"
|
||
" │ └─ Vector access (GMEM write) instruction size: 8\n"
|
||
" ├─ Struct does not contain optional num_gemm_k_prefetch_stage parameter\n"
|
||
" ├─ Max Transpose transfer scr scalar per vector: 1\n"
|
||
" ├─ Max Transpose dst scalar per vector: 1\n"
|
||
" └─ Num groups to merge: 4"));
|
||
}
|
||
|
||
// Test printing of optional parameters num_groups_to_merge,
|
||
// nax_transose_transfer_src_scalar_per_vector and max_transpose_dst_scalar_per_vector
|
||
TEST(ConvDescriptionTest, BwdWeightWmmaCshuffleV3DescriptionTest)
|
||
{
|
||
using Instance = ck::tensor_operation::device::DeviceGroupedConvBwdWeight_Wmma_CShuffle<
|
||
3, // NDimSpatial
|
||
ck::tensor_layout::convolution::GNDHWC, // InLayout
|
||
ck::tensor_layout::convolution::GKZYXC, // WeiLayout
|
||
ck::tensor_layout::convolution::GNDHWK, // OutLayout
|
||
ck::half_t, // InDataType
|
||
ck::half_t, // WeiDataType
|
||
ck::half_t, // OutDataType
|
||
float, // AccDataType
|
||
ck::tensor_operation::element_wise::PassThrough, // InElementwiseOperation
|
||
ck::tensor_operation::element_wise::PassThrough, // WeiElementwiseOperation
|
||
ck::tensor_operation::element_wise::PassThrough, // OutElementwiseOperation
|
||
ck::tensor_operation::device::ConvolutionBackwardWeightSpecialization::
|
||
Default, // ConvBackwardWeightSpecialization
|
||
256, // BlockSize
|
||
128, // MPerBlock
|
||
128, // NPerBlock
|
||
16, // K0PerBlock
|
||
8, // K1
|
||
32, // MPerWmma
|
||
32, // NPerWmma
|
||
4, // MRepeat
|
||
4, // NRepeat
|
||
ck::Sequence<4, 64, 1>, // ABlockTransferThreadClusterLengths_K0_M_K1
|
||
ck::Sequence<1, 0, 2>, // ABlockTransferThreadClusterArrangeOrder_
|
||
ck::Sequence<1, 0, 2>, // ABlockTransferSrcAccessOrder
|
||
2, // ABlockTransferSrcVectorDim
|
||
8, // ABlockTransferSrcScalarPerVector
|
||
8, // ABlockTransferDstScalarPerVector_K1
|
||
1, // ABlockLdsAddExtraM
|
||
ck::Sequence<4, 64, 1>, // BBlockTransferThreadClusterLengths_K0_N_K1
|
||
ck::Sequence<1, 0, 2>, // BBlockTransferThreadClusterArrangeOrder_
|
||
ck::Sequence<1, 0, 2>, // BBlockTransferSrcAccessOrder_
|
||
2, // BBlockTransferSrcVectorDim
|
||
8, // BBlockTransferSrcScalarPerVector
|
||
8, // BBlockTransferDstScalarPerVector_K1
|
||
1, // BBlockLdsAddExtraN
|
||
1, // CShuffleMXdlPerWavePerShuffle
|
||
1, // CShuffleNXdlPerWavePerShuffle
|
||
ck::Sequence<1,
|
||
32,
|
||
1,
|
||
8>, // CBlockTransferClusterLengths_MBlock_MPerBlock_NBlock_NPerBlock_
|
||
8, // CDEBlockTransferScalarPerVector_NPerBlock_
|
||
1, // NummGemmKPrefetchStage
|
||
ck::LoopScheduler::Default, // BlkGemmPipeSched
|
||
ck::PipelineVersion::v1, // BlkGemmPipelineVer
|
||
false>; // BComputeDataType
|
||
|
||
EXPECT_THAT(
|
||
ckr::describe<Instance>().detailed(),
|
||
ckt::StringEqWithDiff( //
|
||
"3D Backward Weight Convolution Kernel\n"
|
||
"├─ Signature\n"
|
||
"│ ├─ Tensor Type: FP16\n"
|
||
"│ ├─ Input Layout: GNDHWC\n"
|
||
"│ ├─ Weight Layout: GKZYXC\n"
|
||
"│ ├─ Output Layout: GNDHWK\n"
|
||
"│ ├─ Input elementwise operation: PASS_THROUGH\n"
|
||
"│ ├─ Weights elementwise operation: PASS_THROUGH\n"
|
||
"│ └─ Output elementwise operation: PASS_THROUGH\n"
|
||
"└─ Algorithm\n"
|
||
" ├─ Thread block size: 256\n"
|
||
" ├─ Data tile size: 128×128×16\n"
|
||
" ├─ Struct does not contain optional gemm_padding argument\n"
|
||
" ├─ Convolution specialization: DEFAULT\n"
|
||
" ├─ Pipeline version: V1\n"
|
||
" ├─ Pipeline scheduler: DEFAULT\n"
|
||
" ├─ Warp Gemm parameters: \n"
|
||
" │ ├─ subtile size: 32×32\n"
|
||
" │ └─ Number of warp gemm iterations: 4×4\n"
|
||
" ├─ Memory access:\n"
|
||
" │ ├─ A Tile transfer: \n"
|
||
" │ │ ├─ Tile dimensions: 2×128×8×\n"
|
||
" │ │ ├─ The innermost K subdimension size: 8\n"
|
||
" │ │ ├─ Spatial thread distribution over the data tile: 1×0×2\n"
|
||
" │ │ ├─ The order of accessing data tile axes: 1×0×2\n"
|
||
" │ │ ├─ Vectorized memory access axis index (with contiguous memory): 2\n"
|
||
" │ │ ├─ Vector access (GMEM read) instruction size: 8\n"
|
||
" │ │ ├─ Vector access (LDS write) instruction size: 8\n"
|
||
" │ │ └─ LDS data layout padding (to prevent bank conflicts): 8\n"
|
||
" │ ├─ B Tile transfer: \n"
|
||
" │ │ ├─ Tile dimensions: 2×128×8×\n"
|
||
" │ │ ├─ The innermost K subdimension size: 8\n"
|
||
" │ │ ├─ Spatial thread distribution over the data tile: 1×0×2\n"
|
||
" │ │ ├─ The order of accessing data tile axes: 1×0×2\n"
|
||
" │ │ ├─ Vectorized memory access axis index (with contiguous memory): 2\n"
|
||
" │ │ ├─ Vector access (GMEM read) instruction size: 8\n"
|
||
" │ │ ├─ Vector access (LDS write) instruction size: 8\n"
|
||
" │ │ └─ LDS data layout padding (to prevent bank conflicts): 8\n"
|
||
" │ └─ C Tile transfer: \n"
|
||
" │ ├─ Data shuffle (number of gemm instructions per iteration): 1×1\n"
|
||
" │ ├─ Spatial thread distribution used to store data: 1×32×1×8\n"
|
||
" │ └─ Vector access (GMEM write) instruction size: 8\n"
|
||
" ├─ Num gemm k prefetch stage: 1\n"
|
||
" ├─ Struct does not contain optional max_transpose_transfer_src_scalar_per_vector "
|
||
"parameter\n"
|
||
" ├─ Struct does not contain optional max_transpose_transfer_dst_scalar_per_vector "
|
||
"parameter\n"
|
||
" └─ Struct does not contain optional num_groups_to_merge parameter"));
|
||
}
|
||
|
||
TEST(ConvDescriptionTest, DefaultInstanceHasInstanceString)
|
||
{
|
||
static constexpr const ConvSignature SIGNATURE;
|
||
static constexpr const DefaultAlgorithm ALGORITHM;
|
||
using Instance = ckb::ConvBuilder<SIGNATURE, ALGORITHM>::Instance;
|
||
|
||
// Get the instance string from the description
|
||
std::string instance_str = ckr::describe<Instance>().instance_string();
|
||
|
||
// Verify that the instance string is not empty
|
||
EXPECT_FALSE(instance_str.empty());
|
||
|
||
// Verify that it contains the device operation name
|
||
// The exact format depends on the InstanceTraits implementation
|
||
EXPECT_THAT(instance_str, ::testing::HasSubstr("DeviceGroupedConvFwdMultipleABD"));
|
||
}
|
||
|
||
// NOTE: BackwardDataInstanceHasDetailedDescription test is disabled because ConvFactory
|
||
// does not have a specialization for backward data convolutions. The test fails with:
|
||
// "implicit instantiation of undefined template 'ck_tile::builder::ConvFactory<...>'"
|
||
//
|
||
// To enable this test, a ConvFactory specialization for backward data operations must be
|
||
// implemented first.
|
||
//
|
||
// TEST(ConvDescriptionTest, BackwardDataInstanceHasDetailedDescription)
|
||
// {
|
||
// struct BackwardDataSignature
|
||
// {
|
||
// int spatial_dim = 2;
|
||
// ckb::ConvDirection direction = ckb::ConvDirection::BACKWARD_DATA;
|
||
// ckb::GroupConvLayout layout = ckb::GroupConvLayout2D::GNHWC_GKYXC_GNHWK;
|
||
// ckb::DataType data_type = ckb::DataType::FP16;
|
||
// ckb::ElementwiseOperation elementwise_operation =
|
||
// ckb::ElementwiseOperation::PASS_THROUGH; ckb::GroupConvDeviceOp device_operation =
|
||
// ckb::BwdDataGroupConvDeviceOperation::DeviceGroupedConvBwdDataMultipleD_Xdl_CShuffle_v1;
|
||
// };
|
||
// static_assert(ckb::ConvSignatureDescriptor<BackwardDataSignature>);
|
||
//
|
||
// static constexpr const BackwardDataSignature SIGNATURE;
|
||
// static constexpr const DefaultAlgorithm ALGORITHM;
|
||
// using Builder = ckb::ConvBuilder<SIGNATURE, ALGORITHM>;
|
||
//
|
||
// // Verify Brief works
|
||
// EXPECT_THAT(ckr::Describe<Builder>().brief(),
|
||
// ckt::StringEqWithDiff("2D Backward Data convolution"));
|
||
//
|
||
// // Verify detailed works - to be updated once ConvFactory is implemented
|
||
// EXPECT_THAT(ckr::Describe<Builder>().detailed(),
|
||
// ckt::StringEqWithDiff("PLACEHOLDER"));
|
||
// }
|
||
|
||
} // namespace
|