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https://github.com/ROCm/composable_kernel.git
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5122637215
* Factor helpers out of conv_traits.hpp * Create a non-templated conv_traits struct * Migrate to new instance-specific instance_to_conv_traits functions * Clean up reflection concepts * Clean up ConvTraits helpers * Update testing for convolution traits This is a lot of cleanup on tests to have verbose coverage of feature extraction, explicit tests for each supported device kernel, and simple, readable test code. * Address reviewer comments and resolve merge conflict
327 lines
19 KiB
C++
327 lines
19 KiB
C++
// Copyright (c) Advanced Micro Devices, Inc., or its affiliates.
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// SPDX-License-Identifier: MIT
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#include <gtest/gtest.h>
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#include <gmock/gmock.h>
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#include <concepts>
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#include <ck/tensor_operation/gpu/element/element_wise_operation.hpp>
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#include <ck_tile/builder/reflect/instance_to_conv_traits.hpp>
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#include <ck_tile/builder/reflect/instance_traits_device_grouped_conv_fwd_multiple_abd_xdl_cshuffle_v3.hpp>
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#include <ck_tile/builder/reflect/instance_traits_device_grouped_conv_fwd_multiple_abd_xdl_cshuffle.hpp>
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#include <ck_tile/builder/reflect/instance_traits_device_grouped_conv_fwd_multiple_d_xdl_large_tensor_cshuffle.hpp>
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namespace {
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using ck_tile::builder::ConvDirection;
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using ck_tile::builder::DataType;
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using ck_tile::builder::ElementwiseOperation;
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using ck_tile::builder::PipelineScheduler;
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using ck_tile::builder::PipelineVersion;
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using ck_tile::builder::TensorLayout;
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using ::testing::ElementsAre;
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// Test fixture for ConvTraits tests
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class ConvTraitsTest : public ::testing::Test
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{
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};
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// Test ConvTraits with DeviceGroupedConvFwdMultipleABD_Xdl_CShuffle_V3
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TEST_F(ConvTraitsTest, ConvFwdTraitsExtraction)
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{
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// Define a concrete instance type with specific template parameters
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using DeviceInstance =
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ck::tensor_operation::device::DeviceGroupedConvFwdMultipleABD_Xdl_CShuffle_V3<
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2, // NDimSpatial
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ck::tensor_layout::convolution::GNHWC, // ALayout
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ck::tensor_layout::convolution::GKYXC, // BLayout
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ck::Tuple<>, // DsLayout
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ck::tensor_layout::convolution::GNHWK, // ELayout
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ck::half_t, // ADataType
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ck::half_t, // BDataType
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float, // AccDataType
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ck::half_t, // CShuffleDataType
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ck::Tuple<>, // DsDataType
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ck::half_t, // EDataType
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ck::tensor_operation::element_wise::PassThrough, // AElementwiseOperation
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ck::tensor_operation::element_wise::PassThrough, // BElementwiseOperation
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ck::tensor_operation::element_wise::PassThrough, // CDEElementwiseOperation
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ck::tensor_operation::device::ConvolutionForwardSpecialization::
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Default, // ConvForwardSpecialization
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ck::tensor_operation::device::GemmSpecialization::Default, // GemmSpec
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256, // BlockSize
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128, // MPerBlock
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128, // NPerBlock
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16, // KPerBlock
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8, // AK1
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8, // BK1
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32, // MPerXDL
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32, // NPerXDL
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4, // MXdlPerWave
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4, // NXdlPerWave
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ck::Sequence<4, 64, 1>, // ABlockTransferThreadClusterLengths_AK0_M_AK1
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ck::Sequence<1, 0, 2>, // ABlockTransferThreadClusterArrangeOrder
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ck::Sequence<1, 0, 2>, // ABlockTransferSrcAccessOrder
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2, // ABlockTransferSrcVectorDim
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8, // ABlockTransferSrcScalarPerVector
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8, // ABlockTransferDstScalarPerVector_AK1
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1, // ABlockLdsExtraM
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ck::Sequence<4, 64, 1>, // BBlockTransferThreadClusterLengths_BK0_N_BK1
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ck::Sequence<1, 0, 2>, // BBlockTransferThreadClusterArrangeOrder
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ck::Sequence<1, 0, 2>, // BBlockTransferSrcAccessOrder
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2, // BBlockTransferSrcVectorDim
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8, // BBlockTransferSrcScalarPerVector
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8, // BBlockTransferDstScalarPerVector_BK1
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1, // BBlockLdsExtraN
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1, // CShuffleMXdlPerWavePerShuffle
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1, // CShuffleNXdlPerWavePerShuffle
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ck::Sequence<1,
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32,
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1,
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8>, // CDEBlockTransferClusterLengths_MBlock_MPerBlock_NBlock_NPerBlock
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8, // CDEBlockTransferScalarPerVector_NPerBlock
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ck::BlockGemmPipelineScheduler::Intrawave, // BlkGemmPipeSched
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ck::BlockGemmPipelineVersion::v1, // BlkGemmPipelineVer
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ck::half_t, // AComputeDataType
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ck::half_t, // BComputeDataType
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false>; // DirectLoad
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// Use ConvTraitsTmpl to extract compile-time information
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const auto traits = ck_tile::reflect::conv::instance_to_conv_traits<DeviceInstance>();
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// Verify signature information
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EXPECT_EQ(traits.spatial_dim, 2);
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EXPECT_EQ(traits.direction, ConvDirection::FORWARD);
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EXPECT_THAT(traits.layout,
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ElementsAre(TensorLayout::GNHWC, TensorLayout::GKYXC, TensorLayout::GNHWK));
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EXPECT_EQ(traits.data_type, DataType::FP16);
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EXPECT_EQ(traits.input_element_op, ElementwiseOperation::PASS_THROUGH);
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EXPECT_EQ(traits.weight_element_op, ElementwiseOperation::PASS_THROUGH);
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EXPECT_EQ(traits.output_element_op, ElementwiseOperation::PASS_THROUGH);
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// Verify specializations
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EXPECT_EQ(traits.gemm_padding, ck_tile::builder::GemmPadding::DEFAULT);
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EXPECT_EQ(traits.conv_specialization, ck_tile::builder::ConvSpecialization::DEFAULT);
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// Verify algorithm information
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EXPECT_EQ(traits.thread_block_size, 256);
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// Verify tile dimensions
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EXPECT_EQ(traits.tile_dims.m, 128);
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EXPECT_EQ(traits.tile_dims.n, 128);
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EXPECT_EQ(traits.tile_dims.k, 16);
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// Verify A tile transfer info
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EXPECT_EQ(traits.a_tile_transfer.tile_dimensions.k0, 2);
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EXPECT_EQ(traits.a_tile_transfer.tile_dimensions.m_or_n, 128);
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EXPECT_EQ(traits.a_tile_transfer.tile_dimensions.k1, 8);
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EXPECT_EQ(traits.a_tile_transfer.transfer_params.k1, 8);
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EXPECT_THAT(traits.a_tile_transfer.transfer_params.thread_cluster_dims, ElementsAre(4, 64, 1));
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EXPECT_THAT(traits.a_tile_transfer.transfer_params.thread_cluster_order, ElementsAre(1, 0, 2));
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EXPECT_THAT(traits.a_tile_transfer.transfer_params.src_access_order, ElementsAre(1, 0, 2));
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EXPECT_EQ(traits.a_tile_transfer.transfer_params.src_vector_dim, 2);
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EXPECT_EQ(traits.a_tile_transfer.transfer_params.src_scalar_per_vector, 8);
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EXPECT_EQ(traits.a_tile_transfer.transfer_params.dst_scalar_per_vector_k1, 8);
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EXPECT_TRUE(traits.a_tile_transfer.transfer_params.lds_padding);
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// Verify B tile transfer info
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EXPECT_EQ(traits.b_tile_transfer.tile_dimensions.k0, 2);
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EXPECT_EQ(traits.b_tile_transfer.tile_dimensions.m_or_n, 128);
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EXPECT_EQ(traits.b_tile_transfer.tile_dimensions.k1, 8);
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EXPECT_EQ(traits.b_tile_transfer.transfer_params.k1, 8);
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EXPECT_THAT(traits.b_tile_transfer.transfer_params.thread_cluster_dims, ElementsAre(4, 64, 1));
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EXPECT_THAT(traits.b_tile_transfer.transfer_params.thread_cluster_order, ElementsAre(1, 0, 2));
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EXPECT_THAT(traits.b_tile_transfer.transfer_params.src_access_order, ElementsAre(1, 0, 2));
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EXPECT_EQ(traits.b_tile_transfer.transfer_params.src_vector_dim, 2);
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EXPECT_EQ(traits.b_tile_transfer.transfer_params.src_scalar_per_vector, 8);
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EXPECT_EQ(traits.b_tile_transfer.transfer_params.dst_scalar_per_vector_k1, 8);
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EXPECT_TRUE(traits.b_tile_transfer.transfer_params.lds_padding);
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// Verify warp GEMM params
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EXPECT_EQ(traits.warp_gemm.gemm_m, 32);
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EXPECT_EQ(traits.warp_gemm.gemm_n, 32);
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EXPECT_EQ(traits.warp_gemm.m_iter, 4);
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EXPECT_EQ(traits.warp_gemm.n_iter, 4);
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// Verify output tile transfer info
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EXPECT_EQ(traits.c_tile_transfer.shuffle_params.m_gemms_per_shuffle, 1);
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EXPECT_EQ(traits.c_tile_transfer.shuffle_params.n_gemms_per_shuffle, 1);
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EXPECT_THAT(traits.c_tile_transfer.thread_cluster_dims, ElementsAre(1, 32, 1, 8));
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EXPECT_EQ(traits.c_tile_transfer.scalar_per_vector, 8);
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// Verify pipeline configuration
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EXPECT_EQ(traits.pipeline_scheduler, PipelineScheduler::INTRAWAVE);
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EXPECT_EQ(traits.pipeline_version, PipelineVersion::V1);
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}
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// Test ConvTraits with DeviceGroupedConvFwdMultipleABD_Xdl_CShuffle
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TEST_F(ConvTraitsTest, ConvFwdBaseTraitsExtraction)
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{
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// Define a concrete instance type with specific template parameters
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using DeviceInstance =
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ck::tensor_operation::device::DeviceGroupedConvFwdMultipleABD_Xdl_CShuffle<
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2, // NDimSpatial
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ck::tensor_layout::convolution::GNHWC, // ALayout
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ck::tensor_layout::convolution::GKYXC, // BLayout
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ck::Tuple<>, // DsLayout
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ck::tensor_layout::convolution::GNHWK, // ELayout
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ck::half_t, // ADataType
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ck::half_t, // BDataType
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float, // AccDataType
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ck::half_t, // CShuffleDataType
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ck::Tuple<>, // DsDataType
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ck::half_t, // EDataType
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ck::tensor_operation::element_wise::PassThrough, // AElementwiseOperation
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ck::tensor_operation::element_wise::PassThrough, // BElementwiseOperation
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ck::tensor_operation::element_wise::PassThrough, // CDEElementwiseOperation
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ck::tensor_operation::device::ConvolutionForwardSpecialization::
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Default, // ConvForwardSpecialization
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ck::tensor_operation::device::GemmSpecialization::Default, // GemmSpec
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1, // NumGemmKPrefetchStage
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256, // BlockSize
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128, // MPerBlock
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128, // NPerBlock
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16, // KPerBlock
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8, // AK1
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8, // BK1
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32, // MPerXDL
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32, // NPerXDL
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4, // MXdlPerWave
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4, // NXdlPerWave
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ck::Sequence<4, 64, 1>, // ABlockTransferThreadClusterLengths_AK0_M_AK1
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ck::Sequence<1, 0, 2>, // ABlockTransferThreadClusterArrangeOrder
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ck::Sequence<1, 0, 2>, // ABlockTransferSrcAccessOrder
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2, // ABlockTransferSrcVectorDim
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8, // ABlockTransferSrcScalarPerVector
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8, // ABlockTransferDstScalarPerVector_AK1
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1, // ABlockLdsExtraM
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ck::Sequence<4, 64, 1>, // BBlockTransferThreadClusterLengths_BK0_N_BK1
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ck::Sequence<1, 0, 2>, // BBlockTransferThreadClusterArrangeOrder
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ck::Sequence<1, 0, 2>, // BBlockTransferSrcAccessOrder
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2, // BBlockTransferSrcVectorDim
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8, // BBlockTransferSrcScalarPerVector
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8, // BBlockTransferDstScalarPerVector_BK1
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1, // BBlockLdsExtraN
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1, // CShuffleMXdlPerWavePerShuffle
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1, // CShuffleNXdlPerWavePerShuffle
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ck::Sequence<1,
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32,
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1,
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8>, // CDEBlockTransferClusterLengths_MBlock_MPerBlock_NBlock_NPerBlock
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8, // CDEBlockTransferScalarPerVector_NPerBlock
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ck::half_t, // AComputeDataType
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ck::half_t, // BComputeDataType
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ck::LoopScheduler::Default, // LoopSched
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1>; // NumGroupsToMerge
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// Use ConvTraitsTmpl to extract compile-time information
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const auto traits = ck_tile::reflect::conv::instance_to_conv_traits<DeviceInstance>();
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// Verify signature information
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EXPECT_EQ(traits.spatial_dim, 2);
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EXPECT_EQ(traits.direction, ConvDirection::FORWARD);
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EXPECT_THAT(traits.layout,
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ElementsAre(TensorLayout::GNHWC, TensorLayout::GKYXC, TensorLayout::GNHWK));
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EXPECT_EQ(traits.data_type, DataType::FP16);
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EXPECT_EQ(traits.input_element_op, ElementwiseOperation::PASS_THROUGH);
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EXPECT_EQ(traits.weight_element_op, ElementwiseOperation::PASS_THROUGH);
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EXPECT_EQ(traits.output_element_op, ElementwiseOperation::PASS_THROUGH);
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// Verify specializations
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EXPECT_EQ(traits.gemm_padding, ck_tile::builder::GemmPadding::DEFAULT);
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EXPECT_EQ(traits.conv_specialization, ck_tile::builder::ConvSpecialization::DEFAULT);
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// Verify algorithm information
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EXPECT_EQ(traits.thread_block_size, 256);
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// Verify tile dimensions
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EXPECT_EQ(traits.tile_dims.m, 128);
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EXPECT_EQ(traits.tile_dims.n, 128);
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EXPECT_EQ(traits.tile_dims.k, 16);
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}
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// Test ConvTraits with DeviceGroupedConvFwdMultipleD_Xdl_CShuffle_Large_Tensor
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TEST_F(ConvTraitsTest, ConvFwdLargeTensorTraitsExtraction)
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{
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// Define a concrete instance type with specific template parameters
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using DeviceInstance =
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ck::tensor_operation::device::DeviceGroupedConvFwdMultipleD_Xdl_CShuffle_Large_Tensor<
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2, // NDimSpatial
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ck::tensor_layout::convolution::GNHWC, // ALayout
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ck::tensor_layout::convolution::GKYXC, // BLayout
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ck::Tuple<>, // DsLayout
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ck::tensor_layout::convolution::GNHWK, // ELayout
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ck::half_t, // ADataType
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ck::half_t, // BDataType
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float, // AccDataType
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ck::half_t, // CShuffleDataType
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ck::Tuple<>, // DsDataType
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ck::half_t, // EDataType
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ck::tensor_operation::element_wise::PassThrough, // AElementwiseOperation
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ck::tensor_operation::element_wise::PassThrough, // BElementwiseOperation
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ck::tensor_operation::element_wise::PassThrough, // CDEElementwiseOperation
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ck::tensor_operation::device::ConvolutionForwardSpecialization::
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Default, // ConvForwardSpecialization
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ck::tensor_operation::device::GemmSpecialization::Default, // GemmSpec
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1, // NumGemmKPrefetchStage
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256, // BlockSize
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128, // MPerBlock
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128, // NPerBlock
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16, // KPerBlock
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8, // AK1
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8, // BK1
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32, // MPerXDL
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32, // NPerXDL
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4, // MXdlPerWave
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4, // NXdlPerWave
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ck::Sequence<4, 64, 1>, // ABlockTransferThreadClusterLengths_AK0_M_AK1
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ck::Sequence<1, 0, 2>, // ABlockTransferThreadClusterArrangeOrder
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ck::Sequence<1, 0, 2>, // ABlockTransferSrcAccessOrder
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2, // ABlockTransferSrcVectorDim
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8, // ABlockTransferSrcScalarPerVector
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8, // ABlockTransferDstScalarPerVector_AK1
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1, // ABlockLdsExtraM
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ck::Sequence<4, 64, 1>, // BBlockTransferThreadClusterLengths_BK0_N_BK1
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ck::Sequence<1, 0, 2>, // BBlockTransferThreadClusterArrangeOrder
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ck::Sequence<1, 0, 2>, // BBlockTransferSrcAccessOrder
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2, // BBlockTransferSrcVectorDim
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8, // BBlockTransferSrcScalarPerVector
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8, // BBlockTransferDstScalarPerVector_BK1
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1, // BBlockLdsExtraN
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1, // CShuffleMXdlPerWavePerShuffle
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1, // CShuffleNXdlPerWavePerShuffle
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ck::Sequence<1,
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32,
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1,
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8>, // CDEBlockTransferClusterLengths
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8, // CDEBlockTransferScalarPerVector_NPerBlock
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ck::half_t, // AComputeDataType
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ck::half_t, // BComputeDataType
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ck::LoopScheduler::Default>; // LoopSched
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// Use ConvTraitsTmpl to extract compile-time information
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const auto traits = ck_tile::reflect::conv::instance_to_conv_traits<DeviceInstance>();
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// Verify signature information
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EXPECT_EQ(traits.spatial_dim, 2);
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EXPECT_EQ(traits.direction, ConvDirection::FORWARD);
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EXPECT_THAT(traits.layout,
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ElementsAre(TensorLayout::GNHWC, TensorLayout::GKYXC, TensorLayout::GNHWK));
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EXPECT_EQ(traits.data_type, DataType::FP16);
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EXPECT_EQ(traits.input_element_op, ElementwiseOperation::PASS_THROUGH);
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EXPECT_EQ(traits.weight_element_op, ElementwiseOperation::PASS_THROUGH);
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EXPECT_EQ(traits.output_element_op, ElementwiseOperation::PASS_THROUGH);
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// Verify specializations
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EXPECT_EQ(traits.gemm_padding, ck_tile::builder::GemmPadding::DEFAULT);
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EXPECT_EQ(traits.conv_specialization, ck_tile::builder::ConvSpecialization::DEFAULT);
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// Verify algorithm information
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EXPECT_EQ(traits.thread_block_size, 256);
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// Verify tile dimensions
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EXPECT_EQ(traits.tile_dims.m, 128);
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EXPECT_EQ(traits.tile_dims.n, 128);
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EXPECT_EQ(traits.tile_dims.k, 16);
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}
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} // anonymous namespace
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