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1685048a67
* Add online-compiling facility * Synchronize from fwd-v4r5 and implement host interfaces to call conv-fwd v4r4/v4r5 using on-line compiling method * Tiny adjustment to time reporting * Use object assignment to replace explicit bytes copying in the first kernel of v4r4/v4r5 * Use single thread to assign descriptor object to device memory * Adjust to the workload assignment of the two kernels of v4r4 (experimental) * Revert "Adjust to the workload assignment of the two kernels of v4r4 (experimental)" This reverts commit eb38461456bb0c82b6c0d32cdd616e181907e20c. * Update to make constexpr for generating descriptor types in kernel 2 of dynamic conv-fwd v4r4 * Update to dynamic conv-fwd v4r4 online-compiling * Update to dynamic conv-fwd v4r5 online-compiling (result not accurate) * Tiny update to driver/CMakeLists.txt * clang-format * Tiny comments change * Add env OLC_DUMP_SAVE_TMP_DIR to support saving of temperary dir * Fwd v4r5 olc perf (#39) * added hip-clang flags that fix perf issue of online compilation * fix bug for olc fwd-v4r5-nchw * Move constexpr and type reference statements out of the function body in conv-fwd v4r4/v4r5 kernel wrapper * Remove printing in hip_build_utils.cpp * Update to root CMakeLists.txt * Revert "Move constexpr and type reference statements out of the function body in conv-fwd v4r4/v4r5 kernel wrapper" This reverts commit 3d2c5d8ecdd8298b72d127110500ed5b38d9835c. Co-authored-by: Chao Liu <chao.liu2@amd.com> Co-authored-by: Chao Liu <lc.roy86@gmail.com> Co-authored-by: root <root@dc-smc-18.amd.com>
132 lines
4.2 KiB
C++
132 lines
4.2 KiB
C++
#ifndef CONV_TUNABLES_HPP
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#define CONV_TUNABLES_HPP
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#include "config.hpp"
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struct tunable_dyn_conv_fwd_v4r4_nchw_kcyx_nkhw
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{
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ck::index_t BlockSize; // usually not tunable
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ck::index_t MPerBlock;
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ck::index_t NPerBlock;
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ck::index_t KPerBlock;
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ck::index_t M1PerThread;
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ck::index_t N1PerThread;
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ck::index_t KPerThread;
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ck::index_t M1N1ThreadClusterM10;
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ck::index_t M1N1ThreadClusterN10;
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ck::index_t M1N1ThreadClusterM11;
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ck::index_t M1N1ThreadClusterN11;
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std::array<ck::index_t, 3> ABlockTransferThreadSliceLengths_K_M0_M1;
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std::array<ck::index_t, 3> ABlockTransferThreadClusterLengths_K_M0_M1;
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std::array<ck::index_t, 3> ABlockTransferThreadClusterArrangeOrder;
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std::array<ck::index_t, 3> ABlockTransferSrcAccessOrder;
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ck::index_t ABlockTransferSrcVectorDim;
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ck::index_t ABlockTransferSrcScalarPerVector;
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ck::index_t ABlockTransferDstScalarPerVector_M1;
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bool AThreadTransferSrcResetCoordinateAfterRun;
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std::array<ck::index_t, 3> BBlockTransferThreadSliceLengths_K_N0_N1;
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std::array<ck::index_t, 3> BBlockTransferThreadClusterLengths_K_N0_N1;
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std::array<ck::index_t, 3> BBlockTransferThreadClusterArrangeOrder;
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std::array<ck::index_t, 3> BBlockTransferSrcAccessOrder;
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ck::index_t BBlockTransferSrcVectorDim;
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ck::index_t BBlockTransferSrcScalarPerVector;
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ck::index_t BBlockTransferDstScalarPerVector_N1;
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bool BThreadTransferSrcResetCoordinateAfterRun;
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std::array<ck::index_t, 6> CThreadTransferSrcDstAccessOrder;
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ck::index_t CThreadTransferSrcDstVectorDim;
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ck::index_t CThreadTransferDstScalarPerVector;
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};
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static tunable_dyn_conv_fwd_v4r4_nchw_kcyx_nkhw default_tunable_dyn_conv_fwd_v4r4_nchw_kcyx_nkhw = {
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256, 128, 128, 8, 4, 4, 1,
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8, 8, 2, 2, {4, 1, 1}, {2, 1, 128}, {2, 1, 0},
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{2, 1, 0}, 0, 4, 1, false, {4, 1, 1}, {2, 1, 128},
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{0, 1, 2}, {0, 1, 2}, 2, 1, 1, false, {3, 4, 5, 0, 1, 2},
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5, 1};
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struct tunable_dyn_conv_fwd_v4r5_nchw_kcyx_nkhw
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{
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ck::index_t BlockSize;
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ck::index_t GM1PerBlockGM11;
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ck::index_t GN1PerBlockGN11;
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ck::index_t KPerBlock;
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ck::index_t M1PerThread;
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ck::index_t N1PerThread;
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ck::index_t KPerThread;
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ck::index_t M1N1ThreadClusterM10;
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ck::index_t M1N1ThreadClusterN10;
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ck::index_t M1N1ThreadClusterM11;
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ck::index_t M1N1ThreadClusterN11;
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std::array<ck::index_t, 4> ABlockTransferThreadSliceLengths_GK_GM0_GM10_GM11;
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std::array<ck::index_t, 4> ABlockTransferThreadClusterLengths_GK_GM0_GM10_GM11;
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std::array<ck::index_t, 4> ABlockTransferThreadClusterArrangeOrder;
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std::array<ck::index_t, 4> ABlockTransferSrcAccessOrder;
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ck::index_t ABlockTransferSrcVectorDim;
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ck::index_t ABlockTransferSrcScalarPerVector;
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ck::index_t ABlockTransferDstScalarPerVector_GM11;
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bool AThreadTransferSrcResetCoordinateAfterRun;
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std::array<ck::index_t, 4> BBlockTransferThreadSliceLengths_GK_GN0_GN10_GN11;
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std::array<ck::index_t, 4> BBlockTransferThreadClusterLengths_GK_GN0_GN10_GN11;
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std::array<ck::index_t, 4> BBlockTransferThreadClusterArrangeOrder;
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std::array<ck::index_t, 4> BBlockTransferSrcAccessOrder;
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ck::index_t BBlockTransferSrcVectorDim;
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ck::index_t BBlockTransferSrcScalarPerVector;
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ck::index_t BBlockTransferDstScalarPerVector_GN11;
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bool BThreadTransferSrcResetCoordinateAfterRun;
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std::array<ck::index_t, 6> CThreadTransferSrcDstAccessOrder;
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ck::index_t CThreadTransferSrcDstVectorDim;
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ck::index_t CThreadTransferDstScalarPerVector;
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};
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static tunable_dyn_conv_fwd_v4r5_nchw_kcyx_nkhw default_tunable_dyn_conv_fwd_v4r5_nchw_kcyx_nkhw = {
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256,
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128,
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32,
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8,
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4,
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4,
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1,
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2,
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2,
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8,
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8,
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{4, 1, 1, 1},
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{2, 1, 1, 128},
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{3, 2, 1, 0},
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{3, 2, 1, 0},
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0,
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4,
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1,
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false,
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{1, 4, 1, 1},
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{8, 1, 1, 32},
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{0, 3, 2, 1},
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{0, 3, 2, 1},
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3,
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1,
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1,
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false,
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{3, 4, 5, 0, 1, 2},
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5,
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1};
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static inline int
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conv_hw_out_size(int hw_in_size, int leftPad, int rightPad, int dilation, int yx_size, int stride)
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{
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return (hw_in_size + leftPad + rightPad - dilation * (yx_size - 1) - 1) / stride + 1;
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}
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#endif
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