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https://github.com/ROCm/composable_kernel.git
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* enabled atomic add in tensor copy
* added gridwise GEMM
* added backward data conv using GEMM + atomic
* added backward data conv using GEMM, no atomic
[ROCm/composable_kernel commit: 8f5f64960e]
55 lines
1.3 KiB
C++
55 lines
1.3 KiB
C++
#ifndef CK_CONFIG_NVIDIA_HPP
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#define CK_CONFIG_NVIDIA_HPP
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#include "cuda_runtime.h"
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#include "cuda_fp16.h"
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#include "nvToolsExt.h"
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#include "helper_cuda.h"
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// index type: unsigned or signed
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#define CK_UNSIGNED_INDEX_TYPE 0
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// device backend
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#define CK_DEVICE_BACKEND_NVIDIA 1
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// disable AMD inline asm and intrinsic
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#define CK_USE_AMD_INLINE_ASM 0
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#define CK_THREADWISE_GEMM_USE_AMD_INLINE_ASM 0
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#define CK_USE_AMD_BUFFER_ADDRESSING 0
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#define CK_USE_AMD_BUFFER_ADDRESSING_INTRINSIC 0
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#define CK_USE_AMD_XDLOPS 0
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#define CK_USE_AMD_XDLOPS_INLINE_ASM 0
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// experimental implementation
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#define CK_EXPERIMENTAL_BLOCKWISE_GEMM_USE_PIPELINE 0
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#define CK_EXPERIMENTAL_TENSOR_COORDINATE_USE_CALCULATE_OFFSET_DIFF 0
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#define CK_EXPERIMENTAL_THREADWISE_COPY_V4R2_USE_OPTIMIZED_ADDRESS_CACLULATION 0
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#define CK_EXPERIMENTAL_USE_MORE_COMPILE_STATIC_BLOCKWISE_GENERIC_SLICE_COPY_V1 0
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#define CK_EXPERIMENTAL_USE_MORE_COMPILE_STATIC_THREADWISE_GENERIC_TENSOR_SLICE_COPY_V1R2 0
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#define CK_EXPERIMENTAL_USE_MORE_COMPILE_STATIC_THREADWISE_GENERIC_TENSOR_SLICE_COPY_V2R1 0
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namespace ck {
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enum AddressSpace
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{
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generic,
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global,
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lds,
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vgpr
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};
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enum InMemoryDataOperation
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{
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none,
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atomic_add
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};
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#if CK_UNSIGNED_INDEX_TYPE
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using index_t = uint32_t;
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#else
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using index_t = int32_t;
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#endif
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} // namespace ck
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#endif
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