mirror of
https://github.com/ROCm/composable_kernel.git
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226 lines
9.4 KiB
Plaintext
226 lines
9.4 KiB
Plaintext
#pragma once
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#include "constant_tensor_descriptor.cuh"
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// optimized for scenario if p_in, p_wei, p_out are in register
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template <class TFloat, class InDesc, class WeiDesc, class OutDesc>
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__device__ void threadwise_direct_convolution_1(InDesc,
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TFloat* const __restrict__ p_in,
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WeiDesc,
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TFloat* const __restrict__ p_wei,
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OutDesc,
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TFloat* __restrict__ p_out)
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{
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constexpr auto I0 = Number<0>{};
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constexpr auto I1 = Number<1>{};
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constexpr auto I2 = Number<2>{};
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constexpr auto I3 = Number<3>{};
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constexpr auto in_desc = InDesc{};
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constexpr auto wei_desc = WeiDesc{};
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constexpr auto out_desc = OutDesc{};
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#if 0
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if(blockIdx.x == 0 && threadIdx.x == 0)
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{
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print_ConstantTensorDescriptor(in_desc, "threadwise_direct_convolution: in_desc: ");
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print_ConstantTensorDescriptor(wei_desc, "threadwise_direct_convolution: wei_desc: ");
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print_ConstantTensorDescriptor(out_desc, "threadwise_direct_convolution: out_desc: ");
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}
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#endif
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for(unsigned n = 0; n < out_desc.GetLength(I0); ++n)
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{
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for(unsigned k = 0; k < out_desc.GetLength(I1); ++k)
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{
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for(unsigned ho = 0; ho < out_desc.GetLength(I2); ++ho)
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{
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for(unsigned wo = 0; wo < out_desc.GetLength(I3); ++wo)
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{
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for(unsigned c = 0; c < wei_desc.GetLength(I1); ++c)
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{
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for(unsigned s = 0; s < wei_desc.GetLength(I2); ++s)
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{
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for(unsigned r = 0; r < wei_desc.GetLength(I3); ++r)
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{
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const unsigned hi = ho + s;
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const unsigned wi = wo + r;
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const unsigned in_index = in_desc.Get1dIndex(n, c, hi, wi);
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const unsigned wei_index = wei_desc.Get1dIndex(k, c, s, r);
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const unsigned out_index = out_desc.Get1dIndex(n, k, ho, wo);
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p_out[out_index] += p_wei[wei_index] * p_in[in_index];
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#if 0
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// if(threadIdx.x == 0)
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{
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printf("threadwise_direct_convolution: \t"
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"threadIdx.x %u\t"
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"out_index %u, p_out[out_index] %f, \t"
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"wei_index %u, p_wei[wei_index] %f, \t"
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"in_index %u, p_in[in_index] %f\n",
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threadIdx.x,
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out_index,
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p_out[out_index],
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wei_index,
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p_wei[wei_index],
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in_index,
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p_in[in_index]);
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}
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#endif
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}
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}
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}
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}
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}
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}
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}
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}
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// Optimized for scenario if p_in and p_wei are in LDS, p_out are in register
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// Copy in and wei into register before doing convolution
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template <class TFloat, class InDesc, class WeiDesc, class OutDesc>
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__device__ void threadwise_direct_convolution_2(InDesc,
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TFloat* const __restrict__ p_in,
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WeiDesc,
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TFloat* const __restrict__ p_wei,
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OutDesc,
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TFloat* __restrict__ p_out)
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{
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constexpr auto in_desc = InDesc{};
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constexpr auto wei_desc = WeiDesc{};
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constexpr auto out_desc = OutDesc{};
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constexpr auto in_reg_desc = make_ConstantTensorDescriptor(in_desc.GetLengths());
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constexpr auto wei_reg_desc = make_ConstantTensorDescriptor(wei_desc.GetLengths());
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// register
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TFloat p_in_reg[in_reg_desc.GetElementSpace()];
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TFloat p_wei_reg[wei_reg_desc.GetElementSpace()];
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// copy input tensor into register
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threadwise_4d_tensor_copy(in_desc, p_in, in_reg_desc, p_in_reg, in_reg_desc);
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// copy input tensor into register
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threadwise_4d_tensor_copy(wei_desc, p_wei, wei_reg_desc, p_wei_reg, wei_reg_desc);
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// do convolution
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threadwise_direct_convolution_1(
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in_reg_desc, p_in_reg, wei_reg_desc, p_wei_reg, out_desc, p_out);
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}
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// optimized for scenario where p_in and p_wei are in LDS, p_out is in register
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// break down a non-1x1 convolution into a sequence of 1x1 convolutions,
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// load 1x1 weight into register, and do 1x1 convolution in register.
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template <class TFloat, class InDesc, class WeiDesc, class OutDesc>
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__device__ void threadwise_direct_convolution_3(InDesc,
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TFloat* const __restrict__ p_in,
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WeiDesc,
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TFloat* const __restrict__ p_wei,
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OutDesc,
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TFloat* __restrict__ p_out)
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{
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constexpr auto I0 = Number<0>{};
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constexpr auto I1 = Number<1>{};
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constexpr auto I2 = Number<2>{};
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constexpr auto I3 = Number<3>{};
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constexpr auto in_desc = InDesc{};
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constexpr auto wei_desc = WeiDesc{};
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constexpr auto out_desc = OutDesc{};
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constexpr auto in_reg_desc = make_ConstantTensorDescriptor(Sequence<in_desc.GetLength(I0),
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in_desc.GetLength(I1),
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out_desc.GetLength(I2),
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out_desc.GetLength(I3)>{});
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constexpr auto wei_reg_desc = make_ConstantTensorDescriptor(
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Sequence<wei_desc.GetLength(I0), wei_desc.GetLength(I1), 1, 1>{});
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TFloat p_in_reg[in_reg_desc.GetElementSpace()];
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TFloat p_wei_reg[wei_reg_desc.GetElementSpace()];
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constexpr unsigned in_w_new_read = 1;
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constexpr auto in_desc_reg_new_read =
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make_ConstantTensorDescriptor(Sequence<in_reg_desc.GetLength(I0),
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in_reg_desc.GetLength(I1),
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in_reg_desc.GetLength(I2),
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in_w_new_read>{});
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#if 0
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// loop over vertical direction
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for(unsigned s = 0; s < wei_desc.GetLength(I2); ++s)
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{
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// read first input
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threadwise_4d_tensor_copy(in_desc,
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p_in + in_desc.Get1dIndex(0, 0, s, 0),
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in_reg_desc,
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p_in_reg,
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in_reg_desc);
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// read first 1x1 weight
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threadwise_4d_tensor_copy(wei_desc,
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p_wei + wei_desc.Get1dIndex(0, 0, s, 0),
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wei_reg_desc,
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p_wei_reg,
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wei_reg_desc);
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// do first 1x1 conv
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threadwise_direct_convolution_1(
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in_reg_desc, p_in_reg, wei_reg_desc, p_wei_reg, out_desc, p_out);
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// loop over horizontal direction
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for(unsigned r = 1; r < wei_desc.GetLength(I3); ++r)
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{
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// read new weight
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threadwise_4d_tensor_copy(wei_desc,
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p_wei + wei_desc.Get1dIndex(0, 0, s, r),
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wei_reg_desc,
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p_wei_reg,
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wei_reg_desc);
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// shift old input to the left
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threadwise_4d_tensor_shift_down(in_reg_desc, p_in_reg, I3, Number<in_w_new_read>{});
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// read new input
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threadwise_4d_tensor_copy(
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in_desc,
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p_in + in_desc.Get1dIndex(0, 0, s, r + in_reg_desc.GetLength(I3) - 1),
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in_reg_desc,
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p_in_reg +
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in_reg_desc.Get1dIndex(0, 0, 0, in_reg_desc.GetLength(I3) - in_w_new_read),
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in_desc_reg_new_read);
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// do 1x1 conv
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threadwise_direct_convolution_1(
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in_reg_desc, p_in_reg, wei_reg_desc, p_wei_reg, out_desc, p_out);
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}
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}
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#elif 1
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// loop over vertical direction
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for(unsigned s = 0; s < wei_desc.GetLength(I2); ++s)
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{
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// loop over horizontal direction
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for(unsigned r = 0; r < wei_desc.GetLength(I3); ++r)
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{
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// read new weight
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threadwise_4d_tensor_copy(wei_desc,
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p_wei + wei_desc.Get1dIndex(0, 0, s, r),
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wei_reg_desc,
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p_wei_reg,
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wei_reg_desc);
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// read new input
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threadwise_4d_tensor_copy(
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in_desc, p_in + in_desc.Get1dIndex(0, 0, s, r), in_reg_desc, p_in_reg, in_reg_desc);
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// do 1x1 conv
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threadwise_direct_convolution_1(
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in_reg_desc, p_in_reg, wei_reg_desc, p_wei_reg, out_desc, p_out);
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}
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}
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#endif
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} |