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abf9cc6c5c
* wmma_op + unit test * add arch limitation to wmma test * change arch limitation * Refactor + Add all type unit test(int4 compile failed) * Add f32_16x16x16_bf16 unit test * Remote int4 related * delete deprecated test Co-authored-by: Po Yen Chen <PoYen.Chen@amd.com> Co-authored-by: Chao Liu <chao.liu2@amd.com>
103 lines
3.2 KiB
C++
103 lines
3.2 KiB
C++
// SPDX-License-Identifier: MIT
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// Copyright (c) 2018-2022, Advanced Micro Devices, Inc. All rights reserved.
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#ifndef CK_AMD_WMMA_HPP
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#define CK_AMD_WMMA_HPP
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#include "data_type.hpp"
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// TODO: Add arch limitation
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namespace ck {
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// wave32 only
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// src: fp16, dst: fp32
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template <index_t MPerWave, index_t NPerWave>
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struct intrin_wmma_f32_16x16x16_f16_w32;
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template <>
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struct intrin_wmma_f32_16x16x16_f16_w32<16, 16>
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{
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template <class FloatC>
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__device__ static void Run(const half16_t& reg_a, const half16_t& reg_b, FloatC& reg_c)
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{
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reg_c.template AsType<float8_t>()(Number<0>{}) = __builtin_amdgcn_wmma_f32_16x16x16_f16_w32(
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reg_a, reg_b, reg_c.template AsType<float8_t>()[Number<0>{}]);
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}
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};
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// src: bf16, dst: fp32
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template <index_t MPerWave, index_t NPerWave>
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struct intrin_wmma_f32_16x16x16_bf16_w32;
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template <>
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struct intrin_wmma_f32_16x16x16_bf16_w32<16, 16>
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{
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template <class FloatC>
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__device__ static void Run(const bhalf16_t& reg_a, const bhalf16_t& reg_b, FloatC& reg_c)
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{
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reg_c.template AsType<float8_t>()(Number<0>{}) =
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__builtin_amdgcn_wmma_f32_16x16x16_bf16_w32(
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reg_a, reg_b, reg_c.template AsType<float8_t>()[Number<0>{}]);
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}
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};
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// src: fp16, dst: fp16
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template <index_t MPerWave, index_t NPerWave, index_t Opsel>
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struct intrin_wmma_f16_16x16x16_f16_w32;
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template <index_t Opsel>
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struct intrin_wmma_f16_16x16x16_f16_w32<16, 16, Opsel>
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{
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template <class FloatC>
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__device__ static void Run(const half16_t& reg_a, const half16_t& reg_b, FloatC& reg_c)
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{
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// opsel usage
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// false: D0.[0:15] = result
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// true : D0.[16:31]= result
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reg_c.template AsType<half16_t>()(Number<0>{}) = __builtin_amdgcn_wmma_f16_16x16x16_f16_w32(
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reg_a, reg_b, reg_c.template AsType<half16_t>()[Number<0>{}], Opsel);
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}
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};
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// src: bf16, dst: bf16
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template <index_t MPerWave, index_t NPerWave, index_t Opsel>
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struct intrin_wmma_bf16_16x16x16_bf16_w32;
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template <index_t Opsel>
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struct intrin_wmma_bf16_16x16x16_bf16_w32<16, 16, Opsel>
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{
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template <class FloatC>
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__device__ static void Run(const bhalf16_t& reg_a, const bhalf16_t& reg_b, FloatC& reg_c)
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{
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// opsel usage
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// false: D0.[0:15] = result
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// true : D0.[16:31]= result
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reg_c.template AsType<bhalf16_t>()(Number<0>{}) =
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__builtin_amdgcn_wmma_bf16_16x16x16_bf16_w32(
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reg_a, reg_b, reg_c.template AsType<bhalf16_t>()[Number<0>{}], Opsel);
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}
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};
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// src: iu8, dst: i32
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template <index_t MPerWave, index_t NPerWave, bool neg_a, bool neg_b, bool clamp>
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struct intrin_wmma_i32_16x16x16_iu8_w32;
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template <bool neg_a, bool neg_b, bool clamp>
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struct intrin_wmma_i32_16x16x16_iu8_w32<16, 16, neg_a, neg_b, clamp>
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{
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template <class FloatC>
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__device__ static void Run(const int8x16_t& reg_a, const int8x16_t& reg_b, FloatC& reg_c)
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{
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reg_c.template AsType<int32x8_t>()(Number<0>{}) =
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__builtin_amdgcn_wmma_i32_16x16x16_iu8_w32(
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neg_a,
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bit_cast<int32x4_t>(reg_a),
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neg_b,
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bit_cast<int32x4_t>(reg_b),
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reg_c.template AsType<int32x8_t>()[Number<0>{}],
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clamp);
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}
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};
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} // namespace ck
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#endif
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