Anthony Chang 6d4450ef15 Allow distinct K0/K1 values for A/B block descriptor (#98) ...

* add gitignore

* host tensor: allow generating sequentially increasing value in a given dimension

* gridwise gemm v3r1: allow distinct K0/K1 values for A/B block descriptor

- remove dangling header include
- modify example gemm_xdl accordingly
- infer KPack value from M/NPerXdl
- device conv2d fwd: update parameters accordingly for the underlying gridwise gemm v3r1
(API for conv2d fwd stays the same for now until we decide to expose individual K0s for activation and weight)

* add LDS data dump utility

* profiler: reflect API change for distinct K0/K1 for A/B matrices

* profiler: add conflict-free LDS write FP16 kernel instances

* fix accidental perf regression

* address feedback; cosmetic changes

* clang-format for new files

* format

Co-authored-by: Chao Liu <chao.liu2@amd.com>

2022-02-27 21:06:18 -06:00

..

conv_utils.hpp

Split k f16 (#97)

2022-02-25 01:19:37 -06:00

convolution_forward_specialization.hpp

Fusion Conv+Bias+ReLU(+Add) (#62)

2021-12-26 07:43:42 -07:00

convolution_utility.hpp

Conv3d new (#94)

2022-02-22 22:45:28 -06:00

device_base.hpp

Fusion Conv+Bias+ReLU(+Add) (#62)

2021-12-26 07:43:42 -07:00

device_batched_gemm_xdl.hpp

Conv3d new (#94)

2022-02-22 22:45:28 -06:00

device_conv2d_fwd_xdl_c_shuffle_bias_activation_add_nhwc_kyxc_nhwk.hpp

Conv3d new (#94)

2022-02-22 22:45:28 -06:00

device_conv2d_fwd_xdl_c_shuffle_bias_activation_nhwc_kyxc_nhwk.hpp

Conv3d new (#94)

2022-02-22 22:45:28 -06:00

device_conv2d_fwd_xdl_c_shuffle_nhwc_kyxc_nhwk.hpp

Allow distinct K0/K1 values for A/B block descriptor (#98)

2022-02-27 21:06:18 -06:00

device_conv2d_fwd_xdl_nhwc_kyxc_nhwk.hpp

Conv3d new (#94)

2022-02-22 22:45:28 -06:00

device_conv3d_fwd_naive_ndhwc_kzyxc_ndhwk.hpp

Conv3d new (#94)

2022-02-22 22:45:28 -06:00

device_conv3d_fwd_xdl_ndhwc_kzyxc_ndhwk.hpp

Unify Convolution FWD XDL 1D/2D implementation. (#93)

2022-02-23 10:44:20 -06:00

device_conv_fwd_bias_activation_add.hpp

Fusion Conv+Bias+ReLU(+Add) (#62)

2021-12-26 07:43:42 -07:00

device_conv_fwd_bias_activation.hpp

Fusion Conv+Bias+ReLU(+Add) (#62)

2021-12-26 07:43:42 -07:00

device_conv_fwd.hpp

Fusion Conv+Bias+ReLU(+Add) (#62)

2021-12-26 07:43:42 -07:00

device_convnd_fwd_xdl_nhwc_kyxc_nhwk.hpp

Unify Convolution FWD XDL 1D/2D implementation. (#93)

2022-02-23 10:44:20 -06:00

device_gemm_bias_activation_add.hpp

GEMM+Bias+ReLU+Add (#76)

2022-02-06 22:32:47 -06:00

device_gemm_bias_activation.hpp

GEMM+Bias+ReLU+Add (#76)

2022-02-06 22:32:47 -06:00

device_gemm_xdl_c_shuffle_bias_2d.hpp

Conv3d new (#94)

2022-02-22 22:45:28 -06:00

device_gemm_xdl_c_shuffle_bias_activation_add.hpp

Conv3d new (#94)

2022-02-22 22:45:28 -06:00

device_gemm_xdl_c_shuffle_bias_activation.hpp

Conv3d new (#94)

2022-02-22 22:45:28 -06:00

device_gemm_xdl_c_shuffle.hpp

Allow distinct K0/K1 values for A/B block descriptor (#98)

2022-02-27 21:06:18 -06:00

device_gemm_xdl_splitk_c_shuffle.hpp

Split k f16 (#97)

2022-02-25 01:19:37 -06:00

device_gemm_xdl_splitk.hpp

Add small tile size for fp16/fp32 and NN layout (#80)

2022-02-11 15:49:06 -06:00

device_gemm_xdl.hpp

Add gridwise GEMM pipeline (#89)

2022-02-23 17:23:49 -06:00

device_gemm.hpp

Support alpha beta scaling for GEMM (#78)

2022-02-11 00:48:41 -06:00

device_operation_instance.hpp

Fusion Conv+Bias+ReLU(+Add) (#62)

2021-12-26 07:43:42 -07:00

gemm_specialization.hpp

Add small tile size for fp16/fp32 and NN layout (#80)

2022-02-11 15:49:06 -06:00

tensor_layout.hpp

Unify Convolution FWD XDL 1D/2D implementation. (#93)

2022-02-23 10:44:20 -06:00