mirror of
https://github.com/ROCm/composable_kernel.git
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7e29eecb18
* Convolution ND
* Code unification across dimensions for generating tensor descriptors.
* Example
* Instances
* Move convnd f32 instance file to comply with repo structure.
* Conv 1D tensor layouts.
* Formatting and use ReferenceConv
* Reference ConvFwd supporting 1D and 2D convolution.
* Debug printing TensorLayout name.
* Conv fwd 1D instance f32
* Refactor conv ND example.
Needed to support various conv dimensio.
Needed to support various conv dimensions
* Rename conv nd example director to prevent conflicts.
* Refactor some common utility to single file.
Plus some tests.
* Refactor GetHostTensorDescriptor + UT.
* Add 1D test case.
* Test reference convolution 1d/2d
* Remove some leftovers.
* Fix convolution example error for 1D
* Refactor test check errors utility function.
* Test Conv2D Fwd XDL
* More UT for 1D case.
* Parameterize input & weight initializers.
* Rename example to prevent conflicts.
* Split convnd instance into separate files for 1d/2d
* Address review comments.
* Fix data type for flops/gbytes calculations.
* Assign example number 11.
* 3D cases for convolution utility functions.
* 3D reference convolution.
* Add support for 3D convolution.
* Check for inputs bigger than 2GB.
* Formatting
* Support for bf16/f16/f32/i8 - conv instances + UT.
* Use check_err from test_util.hpp.
* Split convnd test into separate files for each dim.
* Fix data generation and use proper instances.
* Formatting
* Skip tensor initialization if not necessary.
* Fix CMakefiles.
* Remove redundant conv2d_fwd test.
* Lower problem size for conv3D UT.
* 3D case for convnd example.
* Remove leftovers after merge.
* Add Conv Specialization string to GetTypeString
* Skip instance causing numerical errors.
* Small fixes.
* Remove redundant includes.
* Fix namespace name error.
* Script for automatic testing and logging convolution fwd UTs
* Comment out numactl cmd.
* Refine weights initalization and relax rtol for fp16
* Fix weights initialization for int8.
* Add type_convert when store output in ref conv 1D.
* Get back old conv2d_fwd_xdl operation.
* Silence conv debug print.
* format
* clean
* clean
* Fix merge.
* Fix namespace for check_err
Co-authored-by: Adam Osewski <aosewski@amd.com>
Co-authored-by: Chao Liu <chao.liu2@amd.com>
[ROCm/composable_kernel commit: f91579aab6]
295 lines
12 KiB
C++
295 lines
12 KiB
C++
#include <half.hpp>
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#include <iostream>
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#include <stdexcept>
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#include <tuple>
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#include <vector>
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#include "data_type.hpp"
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#include "element_wise_operation.hpp"
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#include "conv_test_util.hpp"
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#include "host_tensor.hpp"
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#include "tensor_layout.hpp"
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#include "test_util.hpp"
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// Forward declarations for conv instances.
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using DeviceConvFwdNoOpPtr =
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ck::tensor_operation::device::DeviceConvFwdPtr<ck::tensor_operation::element_wise::PassThrough,
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ck::tensor_operation::element_wise::PassThrough,
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ck::tensor_operation::element_wise::PassThrough>;
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namespace ck {
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namespace tensor_operation {
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namespace device {
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namespace device_conv3d_fwd_instance {
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void add_device_conv3d_fwd_xdl_ndhwc_kzyxc_ndhwk_bf16_instances(std::vector<DeviceConvFwdNoOpPtr>&);
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void add_device_conv3d_fwd_xdl_ndhwc_kzyxc_ndhwk_f16_instances(std::vector<DeviceConvFwdNoOpPtr>&);
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void add_device_conv3d_fwd_xdl_ndhwc_kzyxc_ndhwk_f32_instances(std::vector<DeviceConvFwdNoOpPtr>&);
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void add_device_conv3d_fwd_xdl_ndhwc_kzyxc_ndhwk_int8_instances(std::vector<DeviceConvFwdNoOpPtr>&);
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} // namespace device_conv3d_fwd_instance
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} // namespace device
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} // namespace tensor_operation
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} // namespace ck
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namespace {
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bool TestConv3DNDHWC()
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{
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bool res{true};
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ck::conv_util::ConvParams params;
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params.num_dim_spatial = 3;
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params.N = 2;
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params.K = 16;
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params.C = 4;
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params.filter_spatial_lengths = std::vector<ck::index_t>{3, 3, 3};
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params.input_spatial_lengths = std::vector<ck::index_t>{16, 16, 16};
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params.conv_filter_strides = std::vector<ck::index_t>{1, 1, 1};
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params.conv_filter_dilations = std::vector<ck::index_t>{1, 1, 1};
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params.input_left_pads = std::vector<ck::index_t>{1, 1, 1};
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params.input_right_pads = std::vector<ck::index_t>{1, 1, 1};
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auto host_tensors = test::conv::GetHostTensors<float,
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float,
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float,
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ck::tensor_layout::convolution::NDHWC,
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ck::tensor_layout::convolution::KZYXC,
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ck::tensor_layout::convolution::NDHWK>(params);
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const Tensor<float>& input = std::get<0>(host_tensors);
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const Tensor<float>& weights = std::get<1>(host_tensors);
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Tensor<float>& host_output = std::get<2>(host_tensors);
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Tensor<float>& device_output = std::get<3>(host_tensors);
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test::conv::RunReferenceConv<3>(params, input, weights, host_output);
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test::conv::RunConv<3>(params, input, weights, device_output);
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res = res &&
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test::check_err(
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device_output.mData, host_output.mData, "Error: incorrect results!", 1e-5f, 1e-4f);
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return res;
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}
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bool TestConv3DNDHWC2GBInput()
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{
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// >2GB Input
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ck::conv_util::ConvParams params;
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params.num_dim_spatial = 3;
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params.N = 2;
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params.K = 16;
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params.C = 32;
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params.filter_spatial_lengths = std::vector<ck::index_t>{3, 3, 3};
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params.input_spatial_lengths = std::vector<ck::index_t>{32, 1000, 1000};
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params.conv_filter_strides = std::vector<ck::index_t>{1, 1, 1};
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params.conv_filter_dilations = std::vector<ck::index_t>{1, 1, 1};
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params.input_left_pads = std::vector<ck::index_t>{1, 1, 1};
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params.input_right_pads = std::vector<ck::index_t>{1, 1, 1};
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auto host_tensors =
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test::conv::GetHostTensors<float,
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float,
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float,
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ck::tensor_layout::convolution::NDHWC,
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ck::tensor_layout::convolution::KZYXC,
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ck::tensor_layout::convolution::NDHWK>(params, false);
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const Tensor<float>& input = std::get<0>(host_tensors);
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const Tensor<float>& weights = std::get<1>(host_tensors);
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Tensor<float>& device_output = std::get<3>(host_tensors);
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try
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{
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test::conv::RunConv<3>(params, input, weights, device_output);
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}
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catch(const std::runtime_error& err)
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{
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std::string err_msg{"Error! device_conv with the specified compilation parameters does "
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"not support this Conv problem"};
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if(err.what() != err_msg)
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{
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return false;
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}
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return true;
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}
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std::cout << "Error: Failure checking oversized tensor!" << std::endl;
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return false;
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}
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bool TestConv3DNDHWC2GBFilters()
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{
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// >2GB Filters
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ck::conv_util::ConvParams params;
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params.num_dim_spatial = 3;
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params.N = 2;
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params.K = 16;
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params.C = 32;
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params.filter_spatial_lengths = std::vector<ck::index_t>{4, 1000, 1000};
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params.input_spatial_lengths = std::vector<ck::index_t>{16, 16, 16};
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params.conv_filter_strides = std::vector<ck::index_t>{1, 1, 1};
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params.conv_filter_dilations = std::vector<ck::index_t>{1, 1, 1};
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params.input_left_pads = std::vector<ck::index_t>{1, 1, 1};
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params.input_right_pads = std::vector<ck::index_t>{1, 1, 1};
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auto host_tensors =
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test::conv::GetHostTensors<float,
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float,
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float,
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ck::tensor_layout::convolution::NDHWC,
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ck::tensor_layout::convolution::KZYXC,
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ck::tensor_layout::convolution::NDHWK>(params, false);
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const Tensor<float>& input = std::get<0>(host_tensors);
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const Tensor<float>& weights = std::get<1>(host_tensors);
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Tensor<float>& device_output = std::get<3>(host_tensors);
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try
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{
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test::conv::RunConv<3>(params, input, weights, device_output);
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}
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catch(const std::runtime_error& err)
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{
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std::string err_msg{"Error! device_conv with the specified compilation parameters does "
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"not support this Conv problem"};
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if(err.what() != err_msg)
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{
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return false;
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}
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return true;
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}
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std::cout << "Error: Failure checking oversized tensor!" << std::endl;
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return false;
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}
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bool TestConv3DNDHWC2GBOutput()
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{
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// >2GB Output
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ck::conv_util::ConvParams params;
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params.num_dim_spatial = 3;
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params.N = 2;
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params.K = 16;
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params.C = 2;
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params.filter_spatial_lengths = std::vector<ck::index_t>{1, 1, 1};
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params.input_spatial_lengths = std::vector<ck::index_t>{1000, 1000, 30};
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params.conv_filter_strides = std::vector<ck::index_t>{1, 1, 1};
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params.conv_filter_dilations = std::vector<ck::index_t>{1, 1, 1};
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params.input_left_pads = std::vector<ck::index_t>{2, 2, 2};
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params.input_right_pads = std::vector<ck::index_t>{2, 2, 2};
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auto host_tensors =
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test::conv::GetHostTensors<float,
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float,
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float,
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ck::tensor_layout::convolution::NDHWC,
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ck::tensor_layout::convolution::KZYXC,
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ck::tensor_layout::convolution::NDHWK>(params, false);
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const Tensor<float>& input = std::get<0>(host_tensors);
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const Tensor<float>& weights = std::get<1>(host_tensors);
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Tensor<float>& device_output = std::get<3>(host_tensors);
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try
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{
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test::conv::RunConv<3>(params, input, weights, device_output);
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}
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catch(const std::runtime_error& err)
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{
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std::string err_msg{"Error! device_conv with the specified compilation parameters does "
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"not support this Conv problem"};
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if(err.what() != err_msg)
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{
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return false;
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}
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return true;
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}
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std::cout << "Error: Failure checking oversized tensor!" << std::endl;
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return false;
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}
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template <typename T>
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bool TestConv3DNDHWCInstances(const std::vector<DeviceConvFwdNoOpPtr>& conv_ptrs)
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{
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ck::conv_util::ConvParams params;
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params.N = 64;
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params.num_dim_spatial = 3;
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params.filter_spatial_lengths = std::vector<ck::index_t>{3, 3, 2};
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params.input_spatial_lengths = std::vector<ck::index_t>{32, 32, 2};
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params.conv_filter_strides = std::vector<ck::index_t>{2, 2, 2};
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params.conv_filter_dilations = std::vector<ck::index_t>{1, 1, 1};
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params.input_left_pads = std::vector<ck::index_t>{1, 1, 1};
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params.input_right_pads = std::vector<ck::index_t>{1, 1, 1};
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auto host_tensors = test::conv::GetHostTensors<T,
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T,
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T,
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ck::tensor_layout::convolution::NDHWC,
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ck::tensor_layout::convolution::KZYXC,
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ck::tensor_layout::convolution::NDHWK>(params);
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const Tensor<T>& input = std::get<0>(host_tensors);
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const Tensor<T>& weights = std::get<1>(host_tensors);
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Tensor<T>& host_output = std::get<2>(host_tensors);
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Tensor<T>& device_output = std::get<3>(host_tensors);
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test::conv::RunReferenceConv<3>(params, input, weights, host_output);
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return test::conv::RunConvInstances<3>(
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params, conv_ptrs, input, weights, device_output, host_output);
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}
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bool TestConv3DNDHWCBF16Instances()
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{
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std::vector<DeviceConvFwdNoOpPtr> conv_ptrs;
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ck::tensor_operation::device::device_conv3d_fwd_instance::
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add_device_conv3d_fwd_xdl_ndhwc_kzyxc_ndhwk_bf16_instances(conv_ptrs);
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return TestConv3DNDHWCInstances<ck::bhalf_t>(conv_ptrs);
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}
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bool TestConv3DNDHWCF16Instances()
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{
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std::vector<DeviceConvFwdNoOpPtr> conv_ptrs;
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ck::tensor_operation::device::device_conv3d_fwd_instance::
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add_device_conv3d_fwd_xdl_ndhwc_kzyxc_ndhwk_f16_instances(conv_ptrs);
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return TestConv3DNDHWCInstances<ck::half_t>(conv_ptrs);
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}
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bool TestConv3DNDHWCF32Instances()
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{
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std::vector<DeviceConvFwdNoOpPtr> conv_ptrs;
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ck::tensor_operation::device::device_conv3d_fwd_instance::
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add_device_conv3d_fwd_xdl_ndhwc_kzyxc_ndhwk_f32_instances(conv_ptrs);
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return TestConv3DNDHWCInstances<float>(conv_ptrs);
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}
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bool TestConv3DNDHWCInt8Instances()
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{
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std::vector<DeviceConvFwdNoOpPtr> conv_ptrs;
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ck::tensor_operation::device::device_conv3d_fwd_instance::
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add_device_conv3d_fwd_xdl_ndhwc_kzyxc_ndhwk_int8_instances(conv_ptrs);
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return TestConv3DNDHWCInstances<int8_t>(conv_ptrs);
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}
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} // anonymous namespace
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int main()
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{
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bool res{true};
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res = TestConv3DNDHWC();
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std::cout << "TestConv3DNDHWC ..... " << (res ? "SUCCESS" : "FAILURE") << std::endl;
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res = TestConv3DNDHWC2GBInput();
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std::cout << "\nTestConv3DNDHWC2GBInput ..... " << (res ? "SUCCESS" : "FAILURE") << std::endl;
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res = TestConv3DNDHWC2GBFilters();
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std::cout << "\nTestConv3DNDHWC2GBFilters ..... " << (res ? "SUCCESS" : "FAILURE") << std::endl;
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res = TestConv3DNDHWC2GBOutput();
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std::cout << "\nTestConv3DNDHWC2GBOutput ..... " << (res ? "SUCCESS" : "FAILURE") << std::endl;
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res = TestConv3DNDHWCBF16Instances();
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std::cout << "\nTestConv3DNDHWCBF16Instances ..... " << (res ? "SUCCESS" : "FAILURE")
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<< std::endl;
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res = TestConv3DNDHWCF16Instances();
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std::cout << "\nTestConv3DNDHWCF16Instances ..... " << (res ? "SUCCESS" : "FAILURE")
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<< std::endl;
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res = TestConv3DNDHWCF32Instances();
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std::cout << "\nTestConv3DNDHWCF32Instances ..... " << (res ? "SUCCESS" : "FAILURE")
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<< std::endl;
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res = TestConv3DNDHWCInt8Instances();
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std::cout << "\nTestConv3DNDHWCInt8Instances ..... " << (res ? "SUCCESS" : "FAILURE")
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<< std::endl;
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return 0;
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}
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