AMD-dteng d5c8a334ca enable bias feature that add bias before adding residual (for rtpllm project) (#1741) ...

* 1. enable bias feature that add bias before adding residual; 2. change block size from 128->64 when m<64 in fp16

* delete comment

* 1.remove fmha change 2.change buffer name from bias to xbias

* Now bias can be used independently from fadd

* change kbias to kxbias

---------

Co-authored-by: feli <felix.li@amd.com>

2025-01-08 17:51:06 +08:00

..

layernorm2d_fwd_pipeline_default_policy.hpp

Ck tile/layernorm: implement naive reduce, opt performance (#1784)

2025-01-03 14:28:59 +08:00

layernorm2d_fwd_pipeline_one_pass.hpp

enable bias feature that add bias before adding residual (for rtpllm project) (#1741)

2025-01-08 17:51:06 +08:00

layernorm2d_fwd_pipeline_problem.hpp

enable bias feature that add bias before adding residual (for rtpllm project) (#1741)

2025-01-08 17:51:06 +08:00

layernorm2d_fwd_pipeline_two_pass.hpp

enable bias feature that add bias before adding residual (for rtpllm project) (#1741)

2025-01-08 17:51:06 +08:00

layernorm2d_fwd_traits.hpp

enable bias feature that add bias before adding residual (for rtpllm project) (#1741)

2025-01-08 17:51:06 +08:00