Chao Liu b6e1c52a80 use buffer_load buffer_store intrinsic

2019-09-19 15:39:07 -05:00

..

conv_common.hpp

update build

2019-07-05 15:33:58 -05:00

device_convolution_direct_v2_nchw_kcyx_nkhw.hpp

reorginzed files

2019-06-13 15:12:12 -05:00

device_convolution_implicit_gemm_v1_chwn_cyxk_khwn_padded.hpp

clean up

2019-09-12 14:55:46 -05:00

device_convolution_implicit_gemm_v1_chwn_cyxk_khwn.hpp

Merge remote-tracking branch 'origin/master' into add_padding

2019-08-15 13:48:45 -05:00

device_convolution_implicit_gemm_v1_nchw_cyxk_nkhw.hpp

reorginzed files

2019-06-13 15:12:12 -05:00

device_convolution_implicit_gemm_v2_chwn_cyxk_khwn.hpp

reorginzed files

2019-06-13 15:12:12 -05:00

device_convolution_implicit_gemm_v3_nchw_cyxk_nkhw.hpp

update build

2019-07-05 15:33:58 -05:00

device_convolution_implicit_gemm_v4r1_nchw_kcyx_nkhw_padded.hpp

enable hip compiler flag: -amdgpu-enable-global-sgpr-addr

2019-09-17 17:34:39 -05:00

device_convolution_implicit_gemm_v4r1_nchw_kcyx_nkhw.hpp

use buffer_load buffer_store intrinsic

2019-09-19 15:39:07 -05:00

device_convolution_implicit_gemm_v4r2_nchw_kcyx_nkhw.hpp

adding implicit gemm v4r3

2019-07-15 17:42:18 -05:00

device_convolution_implicit_gemm_v4r3_nchw_kcyx_nkhw.hpp

adding implicit gemm v4r4

2019-07-28 19:39:57 -05:00

device_convolution_implicit_gemm_v4r4_nchw_kcyx_nkhw_padded.hpp

add lds doble buffer to nchw padded v4r1 and v4r4

2019-09-15 16:58:16 -05:00

device_convolution_implicit_gemm_v4r4_nchw_kcyx_nkhw.hpp

clean up

2019-09-15 12:13:58 -05:00

device_direct_convolution_2_vectorized_nchw_kcyx_nkhw.hpp

reorginzed files

2019-06-13 15:12:12 -05:00

device_implicit_gemm_convolution_1_chwn_cyxk_khwn_padded.hpp

reorginzed files

2019-06-13 15:12:12 -05:00

device.hpp

update build

2019-07-05 15:33:58 -05:00

host_conv.hpp

added tuple

2019-09-06 18:07:56 -05:00

tensor.hpp

Merge remote-tracking branch 'origin/build_0705' into implicit_gemm_v4r2

2019-07-05 16:29:20 -05:00