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composable_kernel/library/src/tensor_operation_instance/gpu/reduce
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Andriy Roshchenko 10edb0c70e Adding Instances and Examples for FP8-based Scaled Convolution with ReLU Activation and AMAX Reduction. (#1469) 
* Enable CMakePresets build

* Verify Convolution, Scaling and ReLU algorithms.

* Add tensor element-wise scale and type cast operation.

* Reduction implemented but does not work.

* Exploration of Reduction functionality.

* Completed example for Convolution scaled with ReLu activation and AMAX reduction.

* WIP: Add required instances for convolution.

* WIP: Create client example. Implement convolution stage.

* Add elementwise instances.

* Add elementwise scale + convert example.

* Add reduction instances.

* WIP: Client example for AMAX reduction.

* WIP: Add instances for multistage reduction.

* WIP: Implementation of multistage reduction.

* Refactoring.

* Clean up.

* Guard off FP8 instances when the data type is not available.

* Improve output readability.

* Addressing reviewer's comments.

[ROCm/composable_kernel commit: a94113a941]
2024-08-20 10:30:56 -05:00
..
CMakeLists.txt
Update to the Reduction API and instances (#476)
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device_reduce_instance_blockwise_b16_f32_b16_add.cpp
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device_reduce_instance_blockwise_b16_f32_b16_amax.cpp
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device_reduce_instance_blockwise_b16_f32_b16_avg.cpp
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device_reduce_instance_blockwise_b16_f32_b16_max.cpp
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device_reduce_instance_blockwise_b16_f32_b16_min.cpp
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device_reduce_instance_blockwise_b16_f32_b16_norm2.cpp
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device_reduce_instance_blockwise_f16_f16_f16_amax.cpp
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device_reduce_instance_blockwise_f16_f16_f16_max.cpp
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device_reduce_instance_blockwise_f16_f16_f16_min.cpp
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device_reduce_instance_blockwise_f16_f32_f16_add.cpp
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device_reduce_instance_blockwise_f16_f32_f16_avg.cpp
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device_reduce_instance_blockwise_f16_f32_f16_norm2.cpp
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device_reduce_instance_blockwise_f32_f32_f32_add.cpp
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device_reduce_instance_blockwise_f32_f32_f32_amax.cpp
Adding Instances and Examples for FP8-based Scaled Convolution with ReLU Activation and AMAX Reduction. (#1469)
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device_reduce_instance_blockwise_f32_f32_f32_avg.cpp
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device_reduce_instance_blockwise_f32_f32_f32_max.cpp
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device_reduce_instance_blockwise_f32_f32_f32_min.cpp
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device_reduce_instance_blockwise_f32_f32_f32_norm2.cpp
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device_reduce_instance_blockwise_f32_f64_f32_add.cpp
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device_reduce_instance_blockwise_f32_f64_f32_avg.cpp
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device_reduce_instance_blockwise_f32_f64_f32_norm2.cpp
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device_reduce_instance_blockwise_f64_f64_f64_add.cpp
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device_reduce_instance_blockwise_f64_f64_f64_amax.cpp
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device_reduce_instance_blockwise_f64_f64_f64_avg.cpp
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device_reduce_instance_blockwise_f64_f64_f64_max.cpp
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device_reduce_instance_blockwise_f64_f64_f64_min.cpp
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device_reduce_instance_blockwise_f64_f64_f64_norm2.cpp
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device_reduce_instance_blockwise_i8_i8_i8_amax.cpp
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device_reduce_instance_blockwise_i8_i8_i8_max.cpp
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device_reduce_instance_blockwise_i8_i8_i8_min.cpp
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device_reduce_instance_blockwise_i8_i32_i8_add.cpp
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device_reduce_instance_blockwise_i8_i32_i8_avg.cpp
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device_reduce_instance_multiblock_atomic_add_b16_f32_f32_add.cpp
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device_reduce_instance_multiblock_atomic_add_b16_f32_f32_avg.cpp
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device_reduce_instance_multiblock_atomic_add_f16_f32_f32_add.cpp
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device_reduce_instance_multiblock_atomic_add_f16_f32_f32_avg.cpp
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device_reduce_instance_multiblock_atomic_add_f32_f32_f32_add.cpp
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device_reduce_instance_multiblock_atomic_add_f32_f32_f32_avg.cpp
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device_reduce_instance_multiblock_atomic_add_f32_f64_f32_add.cpp
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device_reduce_instance_multiblock_atomic_add_f32_f64_f32_avg.cpp
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device_reduce_instance_multiblock_atomic_add_f64_f64_f64_add.cpp
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device_reduce_instance_multiblock_atomic_add_f64_f64_f64_avg.cpp
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device_reduce_instance_threadwise_b16_f32_b16_add.cpp
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device_reduce_instance_threadwise_b16_f32_b16_amax.cpp
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device_reduce_instance_threadwise_b16_f32_b16_avg.cpp
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device_reduce_instance_threadwise_b16_f32_b16_max.cpp
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device_reduce_instance_threadwise_b16_f32_b16_min.cpp
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device_reduce_instance_threadwise_b16_f32_b16_norm2.cpp
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device_reduce_instance_threadwise_f16_f16_f16_amax.cpp
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device_reduce_instance_threadwise_f16_f16_f16_max.cpp
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device_reduce_instance_threadwise_f16_f16_f16_min.cpp
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device_reduce_instance_threadwise_f16_f32_f16_add.cpp
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device_reduce_instance_threadwise_f16_f32_f16_avg.cpp
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device_reduce_instance_threadwise_f16_f32_f16_norm2.cpp
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device_reduce_instance_threadwise_f32_f32_f32_add.cpp
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device_reduce_instance_threadwise_f32_f32_f32_amax.cpp
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device_reduce_instance_threadwise_f32_f32_f32_avg.cpp
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device_reduce_instance_threadwise_f32_f32_f32_max.cpp
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device_reduce_instance_threadwise_f32_f32_f32_min.cpp
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device_reduce_instance_threadwise_f32_f32_f32_norm2.cpp
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device_reduce_instance_threadwise_f32_f64_f32_add.cpp
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device_reduce_instance_threadwise_f32_f64_f32_avg.cpp
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device_reduce_instance_threadwise_f32_f64_f32_norm2.cpp
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device_reduce_instance_threadwise_f64_f64_f64_add.cpp
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device_reduce_instance_threadwise_f64_f64_f64_amax.cpp
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device_reduce_instance_threadwise_f64_f64_f64_avg.cpp
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device_reduce_instance_threadwise_f64_f64_f64_max.cpp
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device_reduce_instance_threadwise_f64_f64_f64_min.cpp
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device_reduce_instance_threadwise_f64_f64_f64_norm2.cpp
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device_reduce_instance_threadwise_i8_i8_i8_amax.cpp
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device_reduce_instance_threadwise_i8_i8_i8_max.cpp
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device_reduce_instance_threadwise_i8_i8_i8_min.cpp
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device_reduce_instance_threadwise_i8_i32_i8_add.cpp
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device_reduce_instance_threadwise_i8_i32_i8_avg.cpp
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