mirror of
https://github.com/ROCm/composable_kernel.git
synced 2026-05-17 11:30:02 +00:00
* experimenting magic number division
* overhauling fwd-v4r4 to clearly reflect transformation graph
* added fwd-v4r5
* bug fix for make_dynamic_naive_tensor_descriptor_aligned_v2
* bug fix and added sanity-check in transform_dynamic_tensor_descriptor
* added conv_driver_v2
[ROCm/composable_kernel commit: 30072aec37]
177 lines
4.6 KiB
C++
177 lines
4.6 KiB
C++
#ifndef CK_CONFIG_AMD_HPP
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#define CK_CONFIG_AMD_HPP
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#ifndef MIOPEN_DONT_USE_HIP_RUNTIME_HEADERS
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#include "hip/hip_runtime.h"
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#include "hip/hip_fp16.h"
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#endif
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#include "bfloat16_dev.hpp"
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// address space for kernel parameter
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#define __CONSTANT__ __attribute__((address_space(4)))
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// device backend
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#define CK_DEVICE_BACKEND_AMD 1
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// GPU ID
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#if 1
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#define CK_AMD_GPU_GFX906 1
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#elif 0
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#define CK_AMD_GPU_GFX908 1
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#elif 1
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#define CK_AMD_GPU_GFX1030 1
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#endif
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// HIP version
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#ifndef CK_HIP_VERSION_FLAT
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#define CK_HIP_VERSION_FLAT 0
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#endif
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// launch bounds
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#define CK_USE_LAUNCH_BOUNDS 0
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#ifdef CK_USE_LAUNCH_BOUNDS
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#define CK_MAX_THREAD_PER_BLOCK 256
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#define CK_MIN_BLOCK_PER_CU 1
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#endif
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// buffer resourse
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#if defined(CK_AMD_GPU_GFX906) || defined(CK_AMD_GPU_GFX908)
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#define CK_BUFFER_RESOURCE_3RD_DWORD 0x00020000
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#elif defined(CK_AMD_GPU_GFX1030)
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#define CK_BUFFER_RESOURCE_3RD_DWORD 0x31014000
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#endif
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// multi index
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#define CK_USE_DYNAMICALLY_INDEXED_MULTI_INDEX 0
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// AMD inline asm
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#ifndef CK_USE_AMD_INLINE_ASM
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#define CK_USE_AMD_INLINE_ASM 1
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#endif
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#ifndef CK_THREADWISE_GEMM_USE_AMD_INLINE_ASM
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#define CK_THREADWISE_GEMM_USE_AMD_INLINE_ASM 1
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#endif
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#ifndef CK_USE_AMD_V_FMAC_F32
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#define CK_USE_AMD_V_FMAC_F32 1
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#endif
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// AMD buffer addressing
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#ifndef CK_USE_AMD_BUFFER_ADDRESSING
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#define CK_USE_AMD_BUFFER_ADDRESSING 1
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#endif
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// only gfx908 support native floating point atomic add
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#ifndef CK_USE_AMD_BUFFER_ATOMIC_FADD
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#define CK_USE_AMD_BUFFER_ATOMIC_FADD 0
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#endif
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// AMD XDLOPS
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#ifndef CK_USE_AMD_XDLOPS
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#define CK_USE_AMD_XDLOPS 0
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#endif
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#ifndef CK_USE_AMD_XDLOPS_INLINE_ASM
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#define CK_USE_AMD_XDLOPS_INLINE_ASM 0
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#endif
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#ifndef CK_USE_AMD_XDLOPS_EMULATE
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#define CK_USE_AMD_XDLOPS_EMULATE 0 // For internal debug purposes
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#endif
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// block synchronization only s_wait lgkmcnt(0), not vmcnt(0)
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#ifndef CK_BLOCK_SYNC_LDS_WITHOUT_SYNC_VMEM
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#define CK_BLOCK_SYNC_LDS_WITHOUT_SYNC_VMEM 1
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#endif
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// experimental implementation
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#ifndef CK_EXPERIMENTAL_USE_BUFFER_LOAD_OOB_CHECK_OFFSET_TRICK
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#define CK_EXPERIMENTAL_USE_BUFFER_LOAD_OOB_CHECK_OFFSET_TRICK 0
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#endif
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#ifndef CK_EXPERIMENTAL_USE_BUFFER_STORE_OOB_CHECK_OFFSET_TRICK
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#define CK_EXPERIMENTAL_USE_BUFFER_STORE_OOB_CHECK_OFFSET_TRICK 1
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#endif
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#ifndef CK_EXPERIMENTAL_USE_BUFFER_ATOMIC_OOB_CHECK_OFFSET_TRICK
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#define CK_EXPERIMENTAL_USE_BUFFER_ATOMIC_OOB_CHECK_OFFSET_TRICK 1
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#endif
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#ifndef CK_EXPERIMENTAL_BLOCKWISE_GEMM_USE_PIPELINE
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#define CK_EXPERIMENTAL_BLOCKWISE_GEMM_USE_PIPELINE 1
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#endif
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#ifndef CK_EXPERIMENTAL_IMPLICIT_GEMM_BACKWARD_DATA_V4R1_OUTPUT_SKIP_OUT_OF_BOUND_CHECK
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#define CK_EXPERIMENTAL_IMPLICIT_GEMM_BACKWARD_DATA_V4R1_OUTPUT_SKIP_OUT_OF_BOUND_CHECK 0
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#endif
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#ifndef CK_EXPERIMENTAL_IMPLICIT_GEMM_BACKWARD_DATA_V4R1_INPUT_SKIP_OUT_OF_BOUND_CHECK
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#define CK_EXPERIMENTAL_IMPLICIT_GEMM_BACKWARD_DATA_V4R1_INPUT_SKIP_OUT_OF_BOUND_CHECK 0
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#endif
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// pass tensor descriptor by value or void*
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#define CK_EXPERIMENTAL_PASS_TENSOR_DESCRIPTOR_BY_VALUE 1
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#define CK_EXPERIMENTAL_PASS_TENSOR_DESCRIPTOR_BY_VOID_POINTER 0
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// merge transformation use magic number division
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#define CK_EXPERIMENTAL_MERGE_USE_MAGIC_DIVISION 0
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// hack: have underlying assumption that need to be satsified, otherwise it's a bug
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// hack for forcing register to keep idx_diff_low_const in SGPR. idx_diff_low_const must be
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// thread-invariant, otherwise it's a bug
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// TODO: separate index calculation into "compile-time", "global", "block", "wave", "thread"
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#ifndef CK_HACK_DYNAMIC_MERGE_CALCULATE_IDX_DIFF_LOW_CONST_USE_AMD_GCN_READ_FIRST_LANE
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#define CK_HACK_DYNAMIC_MERGE_CALCULATE_IDX_DIFF_LOW_CONST_USE_AMD_GCN_READ_FIRST_LANE 0
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#endif
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// workaround: put all workaround here
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// workaround for unnecessary VGPR <--> AGPR data movement when using mfma LLVM intrinsic
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#ifndef CK_WORKAROUND_SWDEV_229564
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#define CK_WORKAROUND_SWDEV_229564 1
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#endif
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// workaround for accvgpr over-allocation
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#ifndef CK_WORKAROUND_SWDEV_241664
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#define CK_WORKAROUND_SWDEV_241664 1
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#endif
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// workaround for compiler crash when compiling recursive lambda
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#ifndef CK_WORKAROUND_SWDEV_275126
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#define CK_WORKAROUND_SWDEV_275126 1
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#endif
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// workaround for compiler crash when using buffer load/store for i8
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#ifndef CK_WORKAROUND_SWDEV_XXXXXX_INT8_BUFFER_LOAD_STORE_ISSUE
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#define CK_WORKAROUND_SWDEV_XXXXXX_INT8_BUFFER_LOAD_STORE_ISSUE 1
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#endif
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// workaround for compiler crash when using buffer load/store for i8
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#ifndef CK_WORKAROUND_SWDEV_XXXXXX_INT8_DS_WRITE_ISSUE
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#define CK_WORKAROUND_SWDEV_XXXXXX_INT8_DS_WRITE_ISSUE 1
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#endif
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namespace ck {
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enum AddressSpace
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{
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Generic,
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Global,
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Lds,
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Sgpr,
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Vgpr
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};
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enum InMemoryDataOperation
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{
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Set,
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AtomicAdd
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};
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// index type
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using index_t = int32_t;
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} // namespace ck
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#endif
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