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https://github.com/ROCm/composable_kernel.git
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* Convolution ND
* Code unification across dimensions for generating tensor descriptors.
* Example
* Instances
* Move convnd f32 instance file to comply with repo structure.
* Conv 1D tensor layouts.
* Formatting and use ReferenceConv
* Reference ConvFwd supporting 1D and 2D convolution.
* Debug printing TensorLayout name.
* Conv fwd 1D instance f32
* Refactor conv ND example.
Needed to support various conv dimensio.
Needed to support various conv dimensions
* Rename conv nd example director to prevent conflicts.
* Refactor some common utility to single file.
Plus some tests.
* Refactor GetHostTensorDescriptor + UT.
* Add 1D test case.
* Test reference convolution 1d/2d
* Remove some leftovers.
* Fix convolution example error for 1D
* Refactor test check errors utility function.
* Test Conv2D Fwd XDL
* More UT for 1D case.
* Parameterize input & weight initializers.
* Rename example to prevent conflicts.
* Split convnd instance into separate files for 1d/2d
* Address review comments.
* Fix data type for flops/gbytes calculations.
* Assign example number 11.
* 3D cases for convolution utility functions.
* 3D reference convolution.
* Add support for 3D convolution.
* Check for inputs bigger than 2GB.
* Formatting
* Support for bf16/f16/f32/i8 - conv instances + UT.
* Use check_err from test_util.hpp.
* Split convnd test into separate files for each dim.
* Fix data generation and use proper instances.
* Formatting
* Skip tensor initialization if not necessary.
* Fix CMakefiles.
* Remove redundant conv2d_fwd test.
* Lower problem size for conv3D UT.
* 3D case for convnd example.
* Remove leftovers after merge.
* Add Conv Specialization string to GetTypeString
* Skip instance causing numerical errors.
* Small fixes.
* Remove redundant includes.
* Fix namespace name error.
* Script for automatic testing and logging convolution fwd UTs
* Comment out numactl cmd.
* Refine weights initalization and relax rtol for fp16
* Move test_util.hpp to check_err.hpp
* Refine weights initalization and relax rtol for fp16
* Refactor common part of test conv utils.
* Move utility function to single common place.
* Add additional common functions to utility.
* Refactor convnd_fwd_xdl examples.
* Remove redundant files.
* Unify structure.
* Add constructor to ConvParams.
* And add input parameters validation.
* Modify conv examples to use single utility file.
* Remove check_error from host_tensor.hpp
* Get rid of check_indices function.
* Remove bf16_to_f32 function overload for scalars.
* Fix namespace.
* Add half_float::half for check_err.
* Fix conv params size in UT.
* Fix weights initialization for int8.
* Fix weights initialization for int8.
* Add type_convert when store output in ref conv 1D.
* Get back old conv2d_fwd_xdl operation.
* Silence conv debug print.
* format
* clean
* clean
* Fix merge.
* Fix namespace for check_err
* Formatting.
* Fix merge artifacts.
* Remove deleted header.
* Fix some includes and use ck::utils::check_err.
* Remove unused check_indices restored by previous merge.
* Fix namespaces after merge.
* Fix compilation error.
* Small fixes.
* Use common functions.
* Fix filename
* Fix namespaces.
* Fix merge artifact - retrieve removed by accident fun.
* Fix ConvForwardSpecialization.
* Adhere to coding style rules.
* Fix merge artifacts.
Co-authored-by: Adam Osewski <aosewski@amd.com>
Co-authored-by: Chao Liu <chao.liu2@amd.com>
[ROCm/composable_kernel commit: abf4bdb9a9]
204 lines
7.0 KiB
C++
204 lines
7.0 KiB
C++
#include <iostream>
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#include <numeric>
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#include <initializer_list>
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#include <cstdlib>
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#include <stdlib.h>
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#include <half.hpp>
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#include "check_err.hpp"
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#include "config.hpp"
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#include "print.hpp"
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#include "device.hpp"
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#include "host_tensor.hpp"
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#include "host_tensor_generator.hpp"
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#include "host_gemm.hpp"
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#include "device_tensor.hpp"
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#include "device_grouped_gemm_xdl.hpp"
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#include "element_wise_operation.hpp"
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#include "reference_gemm.hpp"
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#include "gemm_specialization.hpp"
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using PassThrough = ck::tensor_operation::element_wise::PassThrough;
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using DeviceGroupedGemmPtr_ = ck::tensor_operation::device::DeviceGroupedGemmPtr<
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ck::tensor_operation::element_wise::PassThrough,
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ck::tensor_operation::element_wise::PassThrough,
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ck::tensor_operation::element_wise::PassThrough>;
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namespace ck {
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namespace tensor_operation {
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namespace device {
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namespace device_grouped_gemm_instance {
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void add_device_grouped_gemm_xdl_f16_f16_f16_mk_nk_mn_instances(
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std::vector<DeviceGroupedGemmPtr_>&);
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}
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} // namespace device
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} // namespace tensor_operation
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} // namespace ck
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namespace {
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using ADataType = ck::half_t;
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using BDataType = ck::half_t;
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using CDataType = ck::half_t;
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using AccDataType = float;
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using ALayout = ck::tensor_layout::gemm::RowMajor;
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using BLayout = ck::tensor_layout::gemm::ColumnMajor;
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using CLayout = ck::tensor_layout::gemm::RowMajor;
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bool TestGroupedGemm(DeviceGroupedGemmPtr_& groupedGemmPtr)
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{
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int group_count = rand() % 10 + 1;
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// GEMM shape
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std::vector<ck::tensor_operation::device::GemmShape> gemm_shapes;
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std::vector<const void*> p_a, p_b;
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std::vector<void*> p_c;
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gemm_shapes.reserve(group_count);
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for(int i = 0; i < group_count; i++)
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{
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int M = 256 + 256 * (rand() % 10);
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int N = 256 + 256 * (rand() % 10);
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int K = 128 + 128 * (rand() % 10);
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int AStride = std::is_same<ck::tensor_layout::gemm::RowMajor, ALayout>::value ? K : M;
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int BStride = std::is_same<ck::tensor_layout::gemm::RowMajor, BLayout>::value ? N : K;
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int CStride = std::is_same<ck::tensor_layout::gemm::RowMajor, CLayout>::value ? N : M;
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gemm_shapes.push_back({M, N, K, AStride, BStride, CStride});
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}
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auto f_host_tensor_descriptor =
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[](std::size_t row, std::size_t col, std::size_t stride, auto layout) {
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if(std::is_same<decltype(layout), ck::tensor_layout::gemm::RowMajor>::value)
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{
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return HostTensorDescriptor(std::vector<std::size_t>({row, col}),
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std::vector<std::size_t>({stride, 1}));
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}
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else
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{
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return HostTensorDescriptor(std::vector<std::size_t>({row, col}),
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std::vector<std::size_t>({1, stride}));
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}
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};
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std::vector<Tensor<ADataType>> a_tensors;
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;
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std::vector<Tensor<BDataType>> b_tensors;
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std::vector<Tensor<CDataType>> c_host_tensors;
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std::vector<Tensor<CDataType>> c_device_tensors;
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a_tensors.reserve(group_count);
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b_tensors.reserve(group_count);
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c_host_tensors.reserve(group_count);
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c_device_tensors.reserve(group_count);
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using DeviceMemPtr = std::unique_ptr<DeviceMem>;
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std::vector<DeviceMemPtr> a_tensors_device, b_tensors_device, c_tensors_device;
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a_tensors_device.reserve(group_count);
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b_tensors_device.reserve(group_count);
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c_tensors_device.reserve(group_count);
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for(int i = 0; i < gemm_shapes.size(); i++)
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{
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a_tensors.emplace_back(Tensor<ADataType>(f_host_tensor_descriptor(
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gemm_shapes[i].M, gemm_shapes[i].K, gemm_shapes[i].StrideA, ALayout{})));
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b_tensors.emplace_back(Tensor<BDataType>(f_host_tensor_descriptor(
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gemm_shapes[i].K, gemm_shapes[i].N, gemm_shapes[i].StrideB, BLayout{})));
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c_host_tensors.emplace_back(Tensor<CDataType>(f_host_tensor_descriptor(
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gemm_shapes[i].M, gemm_shapes[i].N, gemm_shapes[i].StrideC, CLayout{})));
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c_device_tensors.emplace_back(Tensor<CDataType>(f_host_tensor_descriptor(
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gemm_shapes[i].M, gemm_shapes[i].N, gemm_shapes[i].StrideC, CLayout{})));
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a_tensors[i].GenerateTensorValue(GeneratorTensor_2<ADataType>{-5, 5});
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b_tensors[i].GenerateTensorValue(GeneratorTensor_2<BDataType>{-5, 5});
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}
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for(int i = 0; i < gemm_shapes.size(); i++)
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{
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a_tensors_device.emplace_back(
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std::make_unique<DeviceMem>(sizeof(ADataType) * a_tensors[i].mDesc.GetElementSize()));
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b_tensors_device.emplace_back(
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std::make_unique<DeviceMem>(sizeof(BDataType) * b_tensors[i].mDesc.GetElementSize()));
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c_tensors_device.emplace_back(std::make_unique<DeviceMem>(
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sizeof(CDataType) * c_device_tensors[i].mDesc.GetElementSize()));
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a_tensors_device[i]->ToDevice(a_tensors[i].mData.data());
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b_tensors_device[i]->ToDevice(b_tensors[i].mData.data());
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p_a.push_back(a_tensors_device[i]->GetDeviceBuffer());
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p_b.push_back(b_tensors_device[i]->GetDeviceBuffer());
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p_c.push_back(c_tensors_device[i]->GetDeviceBuffer());
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}
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auto a_element_op = PassThrough{};
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auto b_element_op = PassThrough{};
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auto c_element_op = PassThrough{};
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// do GEMM
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auto invoker_ptr = groupedGemmPtr->MakeInvokerPointer();
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auto argument_ptr = groupedGemmPtr->MakeArgumentPointer(
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p_a, p_b, p_c, gemm_shapes, a_element_op, b_element_op, c_element_op);
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invoker_ptr->Run(argument_ptr.get());
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for(int i = 0; i < gemm_shapes.size(); i++)
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{
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c_tensors_device[i]->FromDevice(c_device_tensors[i].mData.data());
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using ReferenceGemmInstance = ck::tensor_operation::host::
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ReferenceGemm<ADataType, BDataType, CDataType, PassThrough, PassThrough, PassThrough>;
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auto ref_gemm = ReferenceGemmInstance{};
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auto ref_invoker = ref_gemm.MakeInvoker();
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auto ref_argument = ref_gemm.MakeArgument(a_tensors[i],
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b_tensors[i],
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c_host_tensors[i],
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a_element_op,
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b_element_op,
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c_element_op);
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if(!groupedGemmPtr->IsSupportedArgument(argument_ptr.get()))
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{
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return false;
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}
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ref_invoker.Run(ref_argument);
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bool res = ck::utils::check_err(c_host_tensors[i].mData, c_device_tensors[i].mData);
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std::cout << "group_id: " << i << (res ? " SUCCESS" : " FAILURE") << std::endl;
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if(!res)
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return false;
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}
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return true;
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}
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} // anonymous namespace
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int main()
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{
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std::vector<DeviceGroupedGemmPtr_> groupedGemmPtrs;
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ck::tensor_operation::device::device_grouped_gemm_instance::
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add_device_grouped_gemm_xdl_f16_f16_f16_mk_nk_mn_instances(groupedGemmPtrs);
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bool res = true;
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for(auto& gemmPtr : groupedGemmPtrs)
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{
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res &= TestGroupedGemm(gemmPtr);
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}
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std::cout << "TestGroupedGemm ..... " << (res ? "SUCCESS" : "FAILURE") << std::endl;
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return res ? 0 : 1;
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}
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