From 035ed98b51bb8e4eb50eb3b75d96d61d4646b271 Mon Sep 17 00:00:00 2001 From: Arnav Sharma Date: Fri, 19 Aug 2022 12:05:53 +0530 Subject: [PATCH] Temporarily disabling optimized ZHER - Disabling optimized ZHER pending verification with netlib BLAS test. AMD-Internal: [CPUPL-2416] Change-Id: I74c4d16e1c99ddeb1df91130a8e14feafd0952d0 --- frame/2/her/bli_her_unb_var1_amd.c | 7 +++++-- frame/2/her/bli_her_unb_var2_amd.c | 7 +++++-- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/frame/2/her/bli_her_unb_var1_amd.c b/frame/2/her/bli_her_unb_var1_amd.c index 13334c541..297c9200e 100644 --- a/frame/2/her/bli_her_unb_var1_amd.c +++ b/frame/2/her/bli_her_unb_var1_amd.c @@ -163,8 +163,11 @@ void PASTEMAC(ch,varname) \ ) \ { \ const num_t dt = PASTEMAC(ch,type); \ + /* ToDo: + Enable intrinsic implementation after verifying + with netlib BLAS tests. */ \ /* Redirect to intrinsic implementation of HER for dcomplex */ \ - if ( bli_cpuid_is_avx_supported() == TRUE && bli_is_conj(conjh) && incx == 1 ) \ + /* if ( bli_cpuid_is_avx_supported() == TRUE && bli_is_conj(conjh) && incx == 1 ) \ { \ bli_zher_zen_int_var1 \ ( \ @@ -181,7 +184,7 @@ void PASTEMAC(ch,varname) \ cntx \ ); \ } \ - else \ + else \ */ \ { \ ctype* x0; \ ctype* chi1; \ diff --git a/frame/2/her/bli_her_unb_var2_amd.c b/frame/2/her/bli_her_unb_var2_amd.c index 6fb4a5d29..c101200d2 100644 --- a/frame/2/her/bli_her_unb_var2_amd.c +++ b/frame/2/her/bli_her_unb_var2_amd.c @@ -163,8 +163,11 @@ void PASTEMAC(ch,varname) \ ) \ { \ const num_t dt = PASTEMAC(ch,type); \ + /* ToDo: + Enable intrinsic implementation after verifying + with netlib BLAS tests. */ \ /* Redirect to intrinsic implementation of HER for unit increment */ \ - if ( bli_cpuid_is_avx_supported() == TRUE && bli_is_conj(conjh) && incx == 1 ) \ + /* if ( bli_cpuid_is_avx_supported() == TRUE && bli_is_conj(conjh) && incx == 1 ) \ { \ bli_zher_zen_int_var2 \ ( \ @@ -181,7 +184,7 @@ void PASTEMAC(ch,varname) \ cntx \ ); \ } \ - else \ + else \ */ \ { \ ctype* chi1; \ ctype* x2; \