Adding support for AOCL_ENABLE_INSTRUCTIONS for f32 LPGEMM API.

-Currently lpgemm sets the context (block sizes and micro-kernels) based
on the ISA of the machine it is being executed on. However this approach
does not give the flexibility to select a different context at runtime.
In order to enable runtime selection of context, the context
initialization is modified to read the AOCL_ENABLE_INSTRUCTIONS env
variable and set the context based on the same. As part of this commit,
only f32 context selection is enabled.
-Bug fixes in scale ops in f32 micro-kernels and GEMV path selection.
-Added vectorized f32 packing kernels for NR=16(AVX2) and NR=64(AVX512).
This is only for B matrix and helps remove dependency of f32 lpgemm api
on the BLIS packing framework.

AMD Internal: [CPUPL-5959]

Change-Id: I4b459aaf33c54423952f89905ba43cf119ce20f6

addon/aocl_gemm/config/lpgemm_func_map.h

@@ -44,7 +44,7 @@
 // TODO: Add reference kernels for BF16/VNNI kernels for ISA combinations
 // that is not supported.
 
-// Genoa
+// AVX512 + VNNI + BF16
 #define LPGEMM_KERN_FUNC_MAP_AVX512_VNNI_BF16 \
 	KMACRO(U8S8S16OS16, lpgemm_rowvar_u8s8s16o16_6x32) \
 	KMACRO(U8S8S32OS32, lpgemm_rowvar_u8s8s32o32_6x64) \
@@ -54,6 +54,9 @@
 	KMACRO(S8S8S32OS32, lpgemm_rowvar_s8s8s32os32_6x64) \
 	KMACRO(S8S8S16OS16, lpgemm_rowvar_s8s8s16o16_6x32) \
 
+#define LPGEMM_KERN_FUNC_UPD_MAP_AVX512_VNNI_BF16_TO_AVX2 \
+	KMACRO(F32F32F32OF32, lpgemm_rowvar_f32f32f32of32_6x16m) \
+
 #define LPGEMM_PACKA_FUNC_MAP_AVX512_VNNI_BF16 \
 	PAMACRO(U8S8S16OS16, packa_u8s8s16os16) \
 	PAMACRO(U8S8S32OS32, packa_u8s8s32os32) \
@@ -65,12 +68,16 @@
 #define LPGEMM_PACKB_FUNC_MAP_AVX512_VNNI_BF16           \
 	PBMACRO(U8S8S16OS16, packb_nr32_u8s8s16o16)          \
 	PBMACRO(U8S8S32OS32, packb_nr64_u8s8s32o32)          \
+	PBMACRO(F32F32F32OF32, packb_nr64_f32f32f32of32)     \
 	PBMACRO(BF16BF16F32OF32, packb_nr64_bf16bf16f32of32) \
 	PBMACRO(S8S8S32OS32, packb_nr64_s8s8s32os32)         \
 	PBMACRO(S8S8S16OS16, packb_nr32_s8s8s16o16)          \
 	PBMACRO(U8S4S32OS32, packb_nr64_u8s4s32o32)          \
 	PBMACRO(BF16S4F32OF32, packb_nr64_bf16s4f32of32)
 
+#define LPGEMM_PACKB_FUNC_UPD_MAP_AVX512_VNNI_BF16_TO_AVX2 \
+	PBMACRO(F32F32F32OF32, packb_nr16_f32f32f32of32) \
+
 #define LPGEMM_UNPACKB_FUNC_MAP_AVX512_VNNI_BF16 \
 	UBMACRO(BF16BF16F32OF32, unpackb_nr64_bf16bf16f32of32)
 
@@ -93,6 +100,7 @@
 	UMACRO(F32_SOFTMAX, lpgemm_util_f32_softmax_avx512_kernel) \
 
 
+// AVX512 + VNNI
 #define LPGEMM_KERN_FUNC_MAP_AVX512_VNNI \
 	KMACRO(U8S8S16OS16, lpgemm_rowvar_u8s8s16o16_6x32) \
 	KMACRO(U8S8S32OS32, lpgemm_rowvar_u8s8s32o32_6x64) \
@@ -102,6 +110,9 @@
 	KMACRO(S8S8S32OS32, lpgemm_rowvar_s8s8s32os32_6x64) \
 	KMACRO(S8S8S16OS16, lpgemm_rowvar_s8s8s16o16_6x32) \
 
+#define LPGEMM_KERN_FUNC_UPD_MAP_AVX512_VNNI_TO_AVX2 \
+	KMACRO(F32F32F32OF32, lpgemm_rowvar_f32f32f32of32_6x16m) \
+
 #define LPGEMM_PACKA_FUNC_MAP_AVX512_VNNI \
 	PAMACRO(U8S8S16OS16, packa_u8s8s16os16) \
 	PAMACRO(U8S8S32OS32, packa_u8s8s32os32) \
@@ -113,18 +124,23 @@
 #define LPGEMM_PACKB_FUNC_MAP_AVX512_VNNI \
 	PBMACRO(U8S8S16OS16, packb_nr32_u8s8s16o16) \
 	PBMACRO(U8S8S32OS32, packb_nr64_u8s8s32o32) \
+	PBMACRO(F32F32F32OF32, packb_nr64_f32f32f32of32) \
 	PBMACRO(BF16BF16F32OF32, packb_nr64_bf16bf16f32of32) \
 	PBMACRO(S8S8S32OS32, packb_nr64_s8s8s32os32) \
 	PBMACRO(S8S8S16OS16, packb_nr32_s8s8s16o16) \
 	PBMACRO(U8S4S32OS32, packb_nr64_u8s4s32o32) \
 	PBSMACRO(BF16S4F32OF32, packb_nr64_bf16s4f32of32)
 
+#define LPGEMM_PACKB_FUNC_UPD_MAP_AVX512_VNNI_TO_AVX2 \
+	PBMACRO(F32F32F32OF32, packb_nr16_f32f32f32of32) \
+
 #define LPGEMM_UTIL_KERN_FUNC_MAP_AVX512_VNNI \
 	UMACRO(F32_GELU_TANH, lpgemm_util_f32_gelu_tanh_avx512_kernel) \
 	UMACRO(F32_GELU_ERF, lpgemm_util_f32_gelu_erf_avx512_kernel) \
 	UMACRO(F32_SOFTMAX, lpgemm_util_f32_softmax_avx512_kernel) \
 
 
+// AVX512
 #define LPGEMM_KERN_FUNC_MAP_AVX512 \
 	KMACRO(U8S8S16OS16, lpgemm_rowvar_u8s8s16o16_6x32) \
 	KMACRO(U8S8S32OS32, lpgemm_rowvar_u8s8s32o32_6x64) \
@@ -134,6 +150,9 @@
 	KMACRO(S8S8S32OS32, lpgemm_rowvar_s8s8s32os32_6x64) \
 	KMACRO(S8S8S16OS16, lpgemm_rowvar_s8s8s16o16_6x32) \
 
+#define LPGEMM_KERN_FUNC_UPD_MAP_AVX512_TO_AVX2 \
+	KMACRO(F32F32F32OF32, lpgemm_rowvar_f32f32f32of32_6x16m) \
+
 #define LPGEMM_PACKA_FUNC_MAP_AVX512 \
 	PAMACRO(U8S8S16OS16, packa_u8s8s16os16) \
 	PAMACRO(U8S8S32OS32, packa_u8s8s32os32) \
@@ -145,6 +164,7 @@
 #define LPGEMM_PACKB_FUNC_MAP_AVX512 \
 	PBMACRO(U8S8S16OS16, packb_nr32_u8s8s16o16) \
 	PBMACRO(U8S8S32OS32, packb_nr64_u8s8s32o32) \
+	PBMACRO(F32F32F32OF32, packb_nr64_f32f32f32of32) \
 	PBMACRO(BF16BF16F32OF32, NULL) \
 	PBMACRO(S8S8S32OS32, packb_nr64_s8s8s32os32) \
 	PBMACRO(S8S8S16OS16, packb_nr32_s8s8s16o16) \
@@ -152,13 +172,16 @@
 	PBMACRO(BF16S4F32OF32, NULL) \
 	PBSMACRO(BF16S4F32OF32, NULL) \
 
+#define LPGEMM_PACKB_FUNC_UPD_MAP_AVX512_TO_AVX2 \
+	PBMACRO(F32F32F32OF32, packb_nr16_f32f32f32of32) \
 
 #define LPGEMM_UTIL_KERN_FUNC_MAP_AVX512 \
 	UMACRO(F32_GELU_TANH, lpgemm_util_f32_gelu_tanh_avx512_kernel) \
 	UMACRO(F32_GELU_ERF, lpgemm_util_f32_gelu_erf_avx512_kernel) \
 	UMACRO(F32_SOFTMAX, lpgemm_util_f32_softmax_avx512_kernel) \
 
-// Milan
+
+// AVX2
 #define LPGEMM_KERN_FUNC_MAP_AVX2 \
 	KMACRO(U8S8S16OS16, lpgemm_rowvar_u8s8s16o16_6x32) \
 	KMACRO(U8S8S32OS32, NULL) \
@@ -179,6 +202,7 @@
 #define LPGEMM_PACKB_FUNC_MAP_AVX2 \
 	PBMACRO(U8S8S16OS16, packb_nr32_u8s8s16o16) \
 	PBMACRO(U8S8S32OS32, NULL) \
+	PBMACRO(F32F32F32OF32, packb_nr16_f32f32f32of32) \
 	PBMACRO(BF16BF16F32OF32, NULL) \
 	KMACRO(BF16S4F32OF32, NULL) \
 	PBMACRO(S8S8S32OS32, NULL) \