From 1f30b1301bf6d6047ec29e57a5fde8eb1072a0ee Mon Sep 17 00:00:00 2001 From: "Field G. Van Zee" Date: Sat, 25 Nov 2017 16:54:26 -0600 Subject: [PATCH] Added missing framework support for x86_64 family. Details: - Added support for the x86_64 configuration family to bli_arch.c and bli_arch_config.h. Thanks to Johannes Dieterich for reporting this issue. - Bumped the default value for BLIS_SIMD_NUM_REGISTERS from 16 to 32 and the default value for BLIS_SIMD_SIZE from 32 to 64. This will support configuration families that include Skylake and newer processors without any supported needed in the bli_family_*.h file. The semantics of these values have always been "maximum" and not exact values; comments in bli_kernel_macro_defs.h and the github wiki have been adjusted accordingly. --- frame/base/bli_arch.c | 7 +++---- frame/include/bli_arch_config.h | 3 +++ frame/include/bli_kernel_macro_defs.h | 13 +++++++++---- 3 files changed, 15 insertions(+), 8 deletions(-) diff --git a/frame/base/bli_arch.c b/frame/base/bli_arch.c index 3e6b028fe..d8e33672c 100644 --- a/frame/base/bli_arch.c +++ b/frame/base/bli_arch.c @@ -41,10 +41,9 @@ arch_t bli_arch_query_id( void ) arch_t id = -1; // Architecture families. -#ifdef BLIS_FAMILY_INTEL64 - id = bli_cpuid_query_id(); -#endif -#ifdef BLIS_FAMILY_AMD64 +#if defined BLIS_FAMILY_INTEL64 || \ + defined BLIS_FAMILY_AMD64 || \ + defined BLIS_FAMILY_X86_64 id = bli_cpuid_query_id(); #endif diff --git a/frame/include/bli_arch_config.h b/frame/include/bli_arch_config.h index d0cfbc6aa..339cb1f1c 100644 --- a/frame/include/bli_arch_config.h +++ b/frame/include/bli_arch_config.h @@ -116,6 +116,9 @@ CNTX_INIT_PROTS( generic ) #ifdef BLIS_FAMILY_AMD64 #include "bli_family_amd64.h" #endif +#ifdef BLIS_FAMILY_X86_64 +#include "bli_family_x86_64.h" +#endif // -- Intel64 architectures -- diff --git a/frame/include/bli_kernel_macro_defs.h b/frame/include/bli_kernel_macro_defs.h index dff8bb931..9ee0aa395 100644 --- a/frame/include/bli_kernel_macro_defs.h +++ b/frame/include/bli_kernel_macro_defs.h @@ -106,14 +106,19 @@ #define BLIS_PAGE_SIZE 4096 #endif -// Number of named SIMD vector registers available for use. +// The maximum number of named SIMD vector registers available for use. +// When configuring with umbrella configuration families, this should be +// set to the maximum number of registers across all sub-configurations in +// the family. #ifndef BLIS_SIMD_NUM_REGISTERS -#define BLIS_SIMD_NUM_REGISTERS 16 +#define BLIS_SIMD_NUM_REGISTERS 32 #endif -// Size (in bytes) of each SIMD vector. +// The maximum size (in bytes) of each SIMD vector. +// When configuring with umbrella configuration families, this should be +// set to the maximum SIMD size across all sub-configurations in the family. #ifndef BLIS_SIMD_SIZE -#define BLIS_SIMD_SIZE 32 +#define BLIS_SIMD_SIZE 64 #endif // Alignment size (in bytes) needed by the instruction set for aligned