From 4cfbb47b870f9e484bfa94de81fb7cc0249dc830 Mon Sep 17 00:00:00 2001 From: Mithun Mohan Date: Tue, 11 Feb 2025 10:08:28 +0000 Subject: [PATCH] Initialize block sizes for F32 element wise post-op APIs. -The block sizes and micro kernel dimensions for the F32OF32 group of APIs are updated in the element wise operations cntx map. AMD-Internal: [SWLCSG-3390] Change-Id: Ic5690b7eb4f7b2559d893f374dd811b00e31e329 --- addon/aocl_gemm/config/lpgemm_blksz_map.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/addon/aocl_gemm/config/lpgemm_blksz_map.h b/addon/aocl_gemm/config/lpgemm_blksz_map.h index b25e35a53..6c17919e3 100644 --- a/addon/aocl_gemm/config/lpgemm_blksz_map.h +++ b/addon/aocl_gemm/config/lpgemm_blksz_map.h @@ -70,8 +70,10 @@ #define LPGEMM_SUP_THRES_UPD_MAP_ZEN4_TO_ZEN \ STMACRO(F32F32F32OF32, 512, 200, 240) \ +// Block sizes used only elementwise ops APIs #define LPGEMM_ELTWISE_OPS_BLKSZ_MAP_ZEN4 \ XMACRO(BF16OF32, 144, 1024, 2048, 6, 64) \ + XMACRO(F32OF32, 144, 1024, 2048, 6, 64) \ #define LPGEMM_ELTWISE_OPS_BLKSZ_MAP_ZEN