From a226e54421073f95648229588113ef283ee8cc48 Mon Sep 17 00:00:00 2001 From: Arnav Sharma Date: Thu, 11 Aug 2022 08:45:49 +0000 Subject: [PATCH] AVX512 based SGEMM Optimizations - Updated with optimal cache-blocking sizes for MC, KC and NC for AVX512 Native SGEMM kernel. AMD-Internal: [CPUPL-2385] Change-Id: I1feae5ac79e960c6b26df24756d460243820b797 --- config/zen4/bli_cntx_init_zen4.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/config/zen4/bli_cntx_init_zen4.c b/config/zen4/bli_cntx_init_zen4.c index fc900a1e9..5f0728f18 100644 --- a/config/zen4/bli_cntx_init_zen4.c +++ b/config/zen4/bli_cntx_init_zen4.c @@ -43,10 +43,10 @@ /* s d c z */ \ bli_blksz_init_easy( &blkszs[ BLIS_MR ], 32, 16, 3, 3 ); \ bli_blksz_init_easy( &blkszs[ BLIS_NR ], 12, 14, 8, 4 ); \ - bli_blksz_init_easy( &blkszs[ BLIS_MC ], 480, 240, 144, 18 ); \ - bli_blksz_init ( &blkszs[ BLIS_KC ], 384, 512, 256, 566, \ + bli_blksz_init_easy( &blkszs[ BLIS_MC ], 512, 240, 144, 18 ); \ + bli_blksz_init ( &blkszs[ BLIS_KC ], 480, 512, 256, 566, \ 480, 320, 256, 566 ); \ - bli_blksz_init_easy( &blkszs[ BLIS_NC ], 3072, 4004, 4080, 256 ); \ + bli_blksz_init_easy( &blkszs[ BLIS_NC ], 6144, 4004, 4080, 256 ); \ \ bli_blksz_init_easy( &blkszs[ BLIS_AF ], 8, 8, -1, -1 ); \ bli_blksz_init_easy( &blkszs[ BLIS_DF ], 8, 8, -1, -1 ); \