AVX2 Support for BF16 Kernels - Bug fixes

- Added early return checks for A/B transpose cases and Column major
  support, as it is not currently supported.
- Enabled the JIT kernels for the Zen4 architecture.

AMD Internal: [SWLCSG - 3281]

Change-Id: Ie671676c51c739dd18709892414fd34d26a540df
This commit is contained in:
varshav
2025-02-11 12:40:43 +05:30
parent 0acb5eb9a4
commit f4e3a4b1c3
2 changed files with 14 additions and 7 deletions

View File

@@ -41,11 +41,10 @@
// Disable BF16 kernel in cases where compilers support other avx 512
// features except BF16 ISA.
#if ( defined( BLIS_GCC ) && ( ( __GNUC__ < 11 ) || \
( ( __GNUC__ == 11 ) && ( __GNUC_MINOR__ < 2 ) ) ) )
//Commenting the JIT definition, to enable the BF16 -> F32 path
//#define LPGEMM_BF16_JIT
//#define BPREFETCH_JIT
//#define DUMP_JIT_CODE
( ( __GNUC__ == 11 ) && ( __GNUC_MINOR__ < 2 ) ) ) && defined(BLIS_KERNELS_ZEN4) )
#define LPGEMM_BF16_JIT
#define BPREFETCH_JIT
#define DUMP_JIT_CODE
#endif
typedef void (*lpgemm_m_fringe_f32_ker_ft)