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AVX2 Support for BF16 Kernels - Bug fixes
- Added early return checks for A/B transpose cases and Column major support, as it is not currently supported. - Enabled the JIT kernels for the Zen4 architecture. AMD Internal: [SWLCSG - 3281] Change-Id: Ie671676c51c739dd18709892414fd34d26a540df
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@@ -41,11 +41,10 @@
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// Disable BF16 kernel in cases where compilers support other avx 512
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// features except BF16 ISA.
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#if ( defined( BLIS_GCC ) && ( ( __GNUC__ < 11 ) || \
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( ( __GNUC__ == 11 ) && ( __GNUC_MINOR__ < 2 ) ) ) )
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//Commenting the JIT definition, to enable the BF16 -> F32 path
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//#define LPGEMM_BF16_JIT
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//#define BPREFETCH_JIT
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//#define DUMP_JIT_CODE
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( ( __GNUC__ == 11 ) && ( __GNUC_MINOR__ < 2 ) ) ) && defined(BLIS_KERNELS_ZEN4) )
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#define LPGEMM_BF16_JIT
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#define BPREFETCH_JIT
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#define DUMP_JIT_CODE
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#endif
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typedef void (*lpgemm_m_fringe_f32_ker_ft)
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