From ff2ee0ae3fce91d0e057b7233346b2b5f4bada4e Mon Sep 17 00:00:00 2001
From: Chandrashekara K R <Chandrashekara.KR@amd.com>
Date: Wed, 22 Jun 2022 17:21:58 +0530
Subject: [PATCH] AOCL-WINDOWS: Added the windows build system to build bench
 folder on windows.

1. Added the checks in .c files of the bench folder to read the input parameters from the given input files on windows using fscanf.

Change-Id: Ie0497696304d318f345a646ab0ce3ba84debd4e2
---
 CMakeLists.txt       |  1 +
 bench/CMakeLists.txt | 97 ++++++++++++++++++++++++++++++++++++++++++++
 bench/Makefile       | 10 ++---
 bench/bench_amaxv.c  |  5 +--
 bench/bench_axpbyv.c |  2 +-
 bench/bench_copyv.c  |  4 +-
 bench/bench_dotv.c   |  5 +--
 bench/bench_gemm.c   |  5 +--
 bench/bench_gemmt.c  |  4 +-
 bench/bench_gemv.c   |  5 +--
 bench/bench_ger.c    |  5 +--
 bench/bench_scalv.c  |  5 +--
 bench/bench_swapv.c  |  4 +-
 bench/bench_syrk.c   |  4 +-
 bench/bench_trsm.c   |  4 +-
 bench/bench_trsv.c   |  5 +--
 16 files changed, 128 insertions(+), 37 deletions(-)
 create mode 100644 bench/CMakeLists.txt

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 2558494d9..dce532b07 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -598,6 +598,7 @@ add_subdirectory(frame)
 add_subdirectory(aocl_dtl)
 add_subdirectory(test)
 add_subdirectory(testsuite)
+add_subdirectory(bench)
 if(ENABLE_TESTCPP_TESTING)
     add_subdirectory(vendor/testcpp)
 endif()
diff --git a/bench/CMakeLists.txt b/bench/CMakeLists.txt
new file mode 100644
index 000000000..00d01fdd2
--- /dev/null
+++ b/bench/CMakeLists.txt
@@ -0,0 +1,97 @@
+##Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved.##
+
+add_definitions(-DBLAS="AOCL")
+add_definitions(-DN_REPEAT=1000)
+add_definitions(-DINT_FS="%lld")
+add_definitions(-DUINT_FS="%llu")
+
+add_executable(BenchAmaxv bench_amaxv.c)
+target_link_libraries(BenchAmaxv debug "${LIB_NAME}.lib")
+if(ENABLE_OPENMP)
+    target_link_libraries(BenchAmaxv OpenMP::OpenMP_CXX)
+endif()
+target_link_libraries(BenchAmaxv optimized "${LIB_NAME}.lib")
+
+add_executable(BenchAxpbyv bench_axpbyv.c)
+target_link_libraries(BenchAxpbyv debug "${LIB_NAME}.lib")
+if(ENABLE_OPENMP)
+    target_link_libraries(BenchAxpbyv OpenMP::OpenMP_CXX)
+endif()
+target_link_libraries(BenchAxpbyv optimized "${LIB_NAME}.lib")
+
+add_executable(BenchCopyv bench_copyv.c)
+target_link_libraries(BenchCopyv debug "${LIB_NAME}.lib")
+if(ENABLE_OPENMP)
+    target_link_libraries(BenchCopyv OpenMP::OpenMP_CXX)
+endif()
+target_link_libraries(BenchCopyv optimized "${LIB_NAME}.lib")
+
+add_executable(BenchDotv bench_dotv.c)
+target_link_libraries(BenchDotv debug "${LIB_NAME}.lib")
+if(ENABLE_OPENMP)
+    target_link_libraries(BenchDotv OpenMP::OpenMP_CXX)
+endif()
+target_link_libraries(BenchDotv optimized "${LIB_NAME}.lib")
+
+add_executable(BenchGemm bench_gemm.c)
+target_link_libraries(BenchGemm debug "${LIB_NAME}.lib")
+if(ENABLE_OPENMP)
+    target_link_libraries(BenchGemm OpenMP::OpenMP_CXX)
+endif()
+target_link_libraries(BenchGemm optimized "${LIB_NAME}.lib")
+
+add_executable(BenchGemmt bench_gemmt.c)
+target_link_libraries(BenchGemmt debug "${LIB_NAME}.lib")
+if(ENABLE_OPENMP)
+    target_link_libraries(BenchGemmt OpenMP::OpenMP_CXX)
+endif()
+target_link_libraries(BenchGemmt optimized "${LIB_NAME}.lib")
+
+add_executable(BenchGemv bench_gemv.c)
+target_link_libraries(BenchGemv debug "${LIB_NAME}.lib")
+if(ENABLE_OPENMP)
+    target_link_libraries(BenchGemv OpenMP::OpenMP_CXX)
+endif()
+target_link_libraries(BenchGemv optimized "${LIB_NAME}.lib")
+
+add_executable(BenchGer bench_ger.c)
+target_link_libraries(BenchGer debug "${LIB_NAME}.lib")
+if(ENABLE_OPENMP)
+    target_link_libraries(BenchGer OpenMP::OpenMP_CXX)
+endif()
+target_link_libraries(BenchGer optimized "${LIB_NAME}.lib")
+
+add_executable(BenchScalv bench_scalv.c)
+target_link_libraries(BenchScalv debug "${LIB_NAME}.lib")
+if(ENABLE_OPENMP)
+    target_link_libraries(BenchScalv OpenMP::OpenMP_CXX)
+endif()
+target_link_libraries(BenchScalv optimized "${LIB_NAME}.lib")
+
+add_executable(BenchSwapv bench_swapv.c)
+target_link_libraries(BenchSwapv debug "${LIB_NAME}.lib")
+if(ENABLE_OPENMP)
+    target_link_libraries(BenchSwapv OpenMP::OpenMP_CXX)
+endif()
+target_link_libraries(BenchSwapv optimized "${LIB_NAME}.lib")
+
+add_executable(BenchSyrk bench_syrk.c)
+target_link_libraries(BenchSyrk debug "${LIB_NAME}.lib")
+if(ENABLE_OPENMP)
+    target_link_libraries(BenchSyrk OpenMP::OpenMP_CXX)
+endif()
+target_link_libraries(BenchSyrk optimized "${LIB_NAME}.lib")
+
+add_executable(BenchTrsm bench_trsm.c)
+target_link_libraries(BenchTrsm debug "${LIB_NAME}.lib")
+if(ENABLE_OPENMP)
+    target_link_libraries(BenchTrsm OpenMP::OpenMP_CXX)
+endif()
+target_link_libraries(BenchTrsm optimized "${LIB_NAME}.lib")
+
+add_executable(BenchTrsv bench_trsv.c)
+target_link_libraries(BenchTrsv debug "${LIB_NAME}.lib")
+if(ENABLE_OPENMP)
+    target_link_libraries(BenchTrsv OpenMP::OpenMP_CXX)
+endif()
+target_link_libraries(BenchTrsv optimized "${LIB_NAME}.lib")
diff --git a/bench/Makefile b/bench/Makefile
index d47485b2f..93cca3298 100755
--- a/bench/Makefile
+++ b/bench/Makefile
@@ -6,7 +6,7 @@
 #  libraries.
 #
 #  Copyright (C) 2014, The University of Texas at Austin
-#  Copyright (C) 2017 - 2021, Advanced Micro Devices, Inc. All rights reserved.
+#  Copyright (C) 2017 - 2022, Advanced Micro Devices, Inc. All rights reserved.
 #
 #  Redistribution and use in source and binary forms, with or without
 #  modification, are permitted provided that the following conditions are
@@ -246,17 +246,17 @@ $(TEST_OBJ_PATH)/%.o: $(TEST_SRC_PATH)/%.c
 	$(CC) $(CFLAGS) -c $< -o $@
 
 bench_%_openblas.o: bench_%.c
-	$(CC) $(CFLAGS) -DBLAS=\"openblas\" $(NRTS) -c $< -o $@
+	$(CC) $(CFLAGS) -DBLAS=\"openblas\" $(NRTS) -DINT_FS=\"%ld\" -DUINT_FS=\"%lu\" -c $< -o $@
 
 bench_%_atlas.o: bench_%.c
-	$(CC) $(CFLAGS) -DBLAS=\"atlas\" $(NRTS) -c $< -o $@
+	$(CC) $(CFLAGS) -DBLAS=\"atlas\" $(NRTS) -DINT_FS=\"%ld\" -DUINT_FS=\"%lu\" -c $< -o $@
 
 bench_%_mkl.o: bench_%.c
-	$(CC) $(CFLAGS) -DBLAS=\"mkl\" $(NRTS) -c $< -o $@
+	$(CC) $(CFLAGS) -DBLAS=\"mkl\" $(NRTS) -DINT_FS=\"%ld\" -DUINT_FS=\"%lu\" -c $< -o $@
 
 
 bench_%_blis.o: bench_%.c
-	$(CC) $(CFLAGS) -DBLAS=\"aocl\" $(NRTS) -c $< -o $@
+	$(CC) $(CFLAGS) -DBLAS=\"aocl\" $(NRTS) -DINT_FS=\"%ld\" -DUINT_FS=\"%lu\" -c $< -o $@
 
 
 # -- Executable file rules --
diff --git a/bench/bench_amaxv.c b/bench/bench_amaxv.c
index 739bd0f97..2a0e57897 100644
--- a/bench/bench_amaxv.c
+++ b/bench/bench_amaxv.c
@@ -4,7 +4,7 @@
    An object-based framework for developing high-performance BLAS-like
    libraries.
 
-   Copyright (C) 2021, Advanced Micro Devices, Inc. All rights reserved.
+   Copyright (C) 2021-2022, Advanced Micro Devices, Inc. All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions are
@@ -101,8 +101,7 @@ int main( int argc, char** argv )
     char tmp[256]; // to store function name, line no present in logs.
 
     // {S,D,C,Z} {n incx}
-
-    while (fscanf(fin, "%s %c %ld %ld \n",
+    while (fscanf(fin, "%s %c " INT_FS INT_FS " \n",
         tmp, &dt_ch, &n, &incx) == 4)
     {
 
diff --git a/bench/bench_axpbyv.c b/bench/bench_axpbyv.c
index 36a203f69..c962079dd 100644
--- a/bench/bench_axpbyv.c
+++ b/bench/bench_axpbyv.c
@@ -97,7 +97,7 @@ int main( int argc, char** argv )
 
 	// {function name} {S, D, C, Z} {n} 
 	// {alpha_r} {alpha_i} {incx} {beta_r} {beta_i} {incy}
-	while ( fscanf( fin, "%s %c %ld %lf %lf %ld %lf %lf %ld\n", 
+	while ( fscanf( fin, "%s %c " INT_FS " %lf %lf " INT_FS " %lf %lf " INT_FS "\n",
 			tmp, &dt_ch, &n,
 			&alpha_r, &alpha_i, &incx, &beta_r, &beta_i, &incy ) == 9 )
 	{
diff --git a/bench/bench_copyv.c b/bench/bench_copyv.c
index c46ffc609..7be38907e 100644
--- a/bench/bench_copyv.c
+++ b/bench/bench_copyv.c
@@ -4,7 +4,7 @@
    An object-based framework for developing high-performance BLAS-like
    libraries.
 
-   Copyright (C) 2021, Advanced Micro Devices, Inc. All rights reserved.
+   Copyright (C) 2021-2022, Advanced Micro Devices, Inc. All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions are
@@ -101,7 +101,7 @@ int main( int argc, char** argv )
     inc_t incx, incy;
 
     // {S,D,C,Z} {n incx incy}
-    while (fscanf(fin, "%s %c %ld %ld %ld\n",
+    while (fscanf(fin, "%s %c " INT_FS INT_FS INT_FS "\n",
         tmp, &dt_ch, &n, &incx, &incy) == 5)
     {
 
diff --git a/bench/bench_dotv.c b/bench/bench_dotv.c
index 80dcf8e99..0d39594f7 100644
--- a/bench/bench_dotv.c
+++ b/bench/bench_dotv.c
@@ -4,7 +4,7 @@
    An object-based framework for developing high-performance BLAS-like
    libraries.
 
-   Copyright (C) 2021, Advanced Micro Devices, Inc. All rights reserved.
+   Copyright (C) 2021-2022, Advanced Micro Devices, Inc. All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions are
@@ -104,8 +104,7 @@ int main( int argc, char** argv )
 
 
     // {S,D,C,Z} {n incx incy}
-
-    while (fscanf(fin, "%s %c %ld %ld %ld\n",
+    while (fscanf(fin, "%s %c " INT_FS INT_FS INT_FS "\n",
         tmp, &dt_ch, &n, &incx, &incy) == 5)
       {
 
diff --git a/bench/bench_gemm.c b/bench/bench_gemm.c
index 8258b61d1..908ce0fca 100755
--- a/bench/bench_gemm.c
+++ b/bench/bench_gemm.c
@@ -5,7 +5,7 @@
    libraries.
 
    Copyright (C) 2014, The University of Texas at Austin
-   Copyright (C) 2020-2021, Advanced Micro Devices, Inc. All rights reserved.
+   Copyright (C) 2020-2022, Advanced Micro Devices, Inc. All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions are
@@ -129,8 +129,7 @@ int main( int argc, char** argv )
     //             beta_real, beta_imag, ldc,
     //
     //             number of threads, execution time, gflops ---> ignored by bench
-
-    while (fscanf(fin, "%s %c %c %c %ld %ld %ld %lf %lf %ld %ld %lf %lf %ld[^\n]",
+    while (fscanf(fin, "%s %c %c %c " INT_FS INT_FS INT_FS " %lf %lf " INT_FS INT_FS " %lf %lf " INT_FS"[^\n]",
 	          api_name, &dt_ch, &transA_c, &transB_c, &m, &n, &k, &alpha_r, &alpha_i,
             &lda, &ldb, &beta_r, &beta_i, &ldc) == 14)
     {
diff --git a/bench/bench_gemmt.c b/bench/bench_gemmt.c
index 621c9288c..ad2459374 100644
--- a/bench/bench_gemmt.c
+++ b/bench/bench_gemmt.c
@@ -4,7 +4,7 @@
    An object-based framework for developing high-performance BLAS-like
    libraries.
 
-   Copyright (C) 2020-21, Advanced Micro Devices, Inc. All rights reserved.
+   Copyright (C) 2020-22, Advanced Micro Devices, Inc. All rights reserved.
 
    modification, are permitted provided that the following conditions are
    met:
@@ -122,7 +122,7 @@ int main( int argc, char** argv )
     stor_scheme = 'C'; // since logs are collected at BLAS APIs
 
     // {S,D,C,Z} {triangC : l or u} {n k lda ldb ldc transa transb alpha_real alpha_imaginary beta_real, beta_imaginary}
-    while (fscanf(fin,"%s %c %c %ld %ld %lu %lu %lu %c %c %lf %lf %lf %lf\n",\
+    while (fscanf(fin,"%s %c %c " INT_FS INT_FS UINT_FS UINT_FS UINT_FS " %c %c %lf %lf %lf %lf\n",\
 			tmp, &dt_ch, &uplo_c, &n, &k,\
 			&lda, &ldb, &ldc, &transA_c, &transB_c, \
 			&alpha_r, &alpha_i, &beta_r, &beta_i) == 14)
diff --git a/bench/bench_gemv.c b/bench/bench_gemv.c
index acc459800..9f06bf8ef 100755
--- a/bench/bench_gemv.c
+++ b/bench/bench_gemv.c
@@ -4,7 +4,7 @@
    An object-based framework for developing high-performance BLAS-like
    libraries.
 
-   Copyright (C) 2021, Advanced Micro Devices, Inc. All rights reserved.
+   Copyright (C) 2021-2022, Advanced Micro Devices, Inc. All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions are
@@ -112,8 +112,7 @@ int main( int argc, char** argv )
 
 
     // {S,D,C,Z} {transa m n alpha lda, incx, beta, incy}
-
-    while (fscanf(fin, "%s %c %c %ld %ld %lf %lf %ld %ld %lf %lf %ld\n",
+    while (fscanf(fin, "%s %c %c " INT_FS INT_FS " %lf %lf " INT_FS INT_FS " %lf %lf " INT_FS "\n",
       tmp, &dt_ch, &transA, &m, &n,  &alpha_r, &alpha_i, &lda,\
                   &incx, &beta_r, &beta_i, &incy) == 12)
       {
diff --git a/bench/bench_ger.c b/bench/bench_ger.c
index fb50c9426..2c8981a68 100644
--- a/bench/bench_ger.c
+++ b/bench/bench_ger.c
@@ -4,7 +4,7 @@
    An object-based framework for developing high-performance BLAS-like
    libraries.
 
-   Copyright (C) 2021-22, Advanced Micro Devices, Inc. All rights reserved.
+   Copyright (C) 2021-2022, Advanced Micro Devices, Inc. All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions are
@@ -116,8 +116,7 @@ int main( int argc, char** argv )
 #endif
 
     // {S,D,C,Z} {transa m n alpha incx incy lda}
-
-    while (fscanf(fin, "%s %c %ld %ld %lf %lf %ld %ld %ld\n",
+    while (fscanf(fin, "%s %c " INT_FS INT_FS " %lf %lf " INT_FS INT_FS INT_FS "\n",
         tmp, &dt_ch, &m, &n,  &alpha_r, &alpha_i, &incx, &incy, &lda) == 9)
       {
 
diff --git a/bench/bench_scalv.c b/bench/bench_scalv.c
index 404d5078f..b8cd6241c 100644
--- a/bench/bench_scalv.c
+++ b/bench/bench_scalv.c
@@ -4,7 +4,7 @@
    An object-based framework for developing high-performance BLAS-like
    libraries.
 
-   Copyright (C) 2021, Advanced Micro Devices, Inc. All rights reserved.
+   Copyright (C) 2021-2022, Advanced Micro Devices, Inc. All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions are
@@ -105,8 +105,7 @@ int main( int argc, char** argv )
 
 
     // {S,D,C,Z} {alpha n incx}
-
-    while (fscanf(fin, "%s %c %lf %lf %ld %ld\n",
+    while (fscanf(fin, "%s %c %lf %lf " INT_FS INT_FS "\n",
         tmp, &dt_ch, &alpha_r, &alpha_i, &n, &incx) == 6)
       {
 
diff --git a/bench/bench_swapv.c b/bench/bench_swapv.c
index 16aafdaae..34af6b797 100644
--- a/bench/bench_swapv.c
+++ b/bench/bench_swapv.c
@@ -4,7 +4,7 @@
    An object-based framework for developing high-performance BLAS-like
    libraries.
 
-   Copyright (C) 2021, Advanced Micro Devices, Inc. All rights reserved.
+   Copyright (C) 2021-2022, Advanced Micro Devices, Inc. All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions are
@@ -103,7 +103,7 @@ int main( int argc, char** argv )
     char tmp[256]; // to store function name, line no present in logs.
 
     // {S,D,C,Z} {n incx incy}
-    while (fscanf(fin, "%s %c %ld %ld %ld\n",
+    while (fscanf(fin, "%s %c " INT_FS INT_FS INT_FS "\n",
         tmp, &dt_ch, &n, &incx, &incy) == 5)
     {
 
diff --git a/bench/bench_syrk.c b/bench/bench_syrk.c
index 017b010df..b65db83aa 100644
--- a/bench/bench_syrk.c
+++ b/bench/bench_syrk.c
@@ -4,7 +4,7 @@
    An object-based framework for developing high-performance BLAS-like
    libraries.
 
-   Copyright (C) 2021, Advanced Micro Devices, Inc. All rights reserved.
+   Copyright (C) 2021-2022, Advanced Micro Devices, Inc. All rights reserved.
 
    modification, are permitted provided that the following conditions are
    met:
@@ -120,7 +120,7 @@ int main( int argc, char** argv )
     stor_scheme = 'C'; // since logs are collected at BLAS APIs
 
     // {S,D,C,Z}{ uploc, transa, n, k, alpha_real, alpha_imag, lda, beta_real, beta_imag, ldc}
-    while (fscanf(fin, "%s %c %c %c %ld %ld %lf %lf %lu %lf %lf %lu\n",\
+    while (fscanf(fin, "%s %c %c %c " INT_FS INT_FS " %lf %lf " UINT_FS " %lf %lf " UINT_FS "\n",\
 			tmp, &dt_ch, &uplo_c, &transA_c, &n, &k, &alpha_r,\
 			&alpha_i, &lda, &beta_r, &beta_i, &ldc) == 12)
     {
diff --git a/bench/bench_trsm.c b/bench/bench_trsm.c
index a7d62ebec..b2b7f1af1 100644
--- a/bench/bench_trsm.c
+++ b/bench/bench_trsm.c
@@ -4,7 +4,7 @@
    An object-based framework for developing high-performance BLAS-like
    libraries.
    Copyright (C) 2014, The University of Texas at Austin
-   Copyright (C) 2020-2021, Advanced Micro Devices, Inc. All rights reserved.
+   Copyright (C) 2020-2022, Advanced Micro Devices, Inc. All rights reserved.
    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions are
    met:
@@ -101,7 +101,7 @@ int main( int argc, char** argv )
     f77_char dt_type_arg, side_arg, uploa_arg, transa_arg, diaga_arg;
     f77_char logline[255];
     // input order: {S,D,C,Z} {side, uplo, transa, diag, m, n, lda, ldb, alphaR, alphaI}
-    while(fscanf(fin, "%s %c %c %c %c %c %ld %ld %ld %ld %lf %lf\n",
+    while(fscanf(fin, "%s %c %c %c %c %c " INT_FS INT_FS INT_FS INT_FS " %lf %lf\n",
           logline, &dt_type_arg, &side_arg, &uploa_arg, &transa_arg, &diaga_arg, &m, &n, &lda, &ldb,
            &alphaR, &alphaI) == 12)
     {
diff --git a/bench/bench_trsv.c b/bench/bench_trsv.c
index ca18d3fdc..ddf3ea187 100644
--- a/bench/bench_trsv.c
+++ b/bench/bench_trsv.c
@@ -4,7 +4,7 @@
    An object-based framework for developing high-performance BLAS-like
    libraries.
 
-   Copyright (C) 2021, Advanced Micro Devices, Inc. All rights reserved.
+   Copyright (C) 2021-2022, Advanced Micro Devices, Inc. All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions are
@@ -121,8 +121,7 @@ int main( int argc, char** argv )
     fprintf(fout, "Dt uploa\t transa\t diaga\t m\t lda\t incx\t gflops\n");
 
     // {S,D,C,Z} {uploa transa diaga m lda, incx}
-
-    while (fscanf(fin, "%s %c %c %c %c %ld %ld %ld\n",
+    while (fscanf(fin, "%s %c %c %c %c " INT_FS INT_FS INT_FS "\n",
       tmp, &dt_ch, &uploa_c, &transA, &diaga_c, &m, &lda, &incx) == 8)
     {