5 Commits

Author SHA1 Message Date
Vignesh Balasubramanian
8abb37a0ad Update to AOCL-BLAS bench application for logging outputs
- Updated the format specifiers to have a leading space,
  in order to delimit the outputs appropriately in the
  output file.

- Further updated every source file to have a leading space
  in its format string occuring after the macros.

AMD-Internal: [CPUPL-5895]
Change-Id: If856f55363bb811de0be6fdd1d7bbc8ec5c76c15
2025-02-06 22:59:59 +05:30
Vignesh Balasubramanian
445327f255 Bugfix for AOCL-BLAS bench application
- Bug : When configuring our library with the native
        BLIS integer size being 32, the bench application
	would crash or read an invalid value when parsing
        the input file. This is because of a mismatch
        of format specifier, that we hardset in the
        Makefile.

- Fix : Defined a header that sets the format specifiers
        as macros with the right matching, based on how we
        configure and build the library. It is expected to
        include this header in every source file for
        benchmarking.

AMD-Internal: [CPUPL-5895]
Change-Id: I9718c36a1a9fe3eba4d5da419823c16097902d89
2025-01-29 03:25:57 -05:00
Edward Smyth
82bdf7c8c7 Code cleanup: Copyright notices
- Standardize formatting (spacing etc).
- Add full copyright to cmake files (excluding .json)
- Correct copyright and disclaimer text for frame and
  zen, skx and a couple of other kernels to cover all
  contributors, as is commonly used in other files.
- Fixed some typos and missing lines in copyright
  statements.

AMD-Internal: [CPUPL-4415]
Change-Id: Ib248bb6033c4d0b408773cf0e2a2cda6c2a74371
2024-08-05 15:35:08 -04:00
srikanth pogula
1d7f6d414f Bench APPs - change in Print statement for more params
>Made changes in the print statements in bench files
         to print all the params of the individual APIs

        > Ex : removing tab & adding Func param
         "Dt\t n\t incx\t incy\t gflops\n" --> "Func Dt n incx incy gflops\n"

        > Ex : adding func, incx, incy params
         "dt_ch, n, alpha_r, alpha_i, beta_r, beta_i, gflops" --> "tmp, dt_ch, n, alpha_r, alpha_i, incx,
                                                                       beta_r, beta_i, incy, gflops"

Change-Id: Ib5d151d7472d3f88c13a85a615a447dfa5e6b528
2024-07-11 02:04:19 -04:00
Eleni Vlachopoulou
a5891f7ead Adding AVX2 support for DNRM2
- For the cases where AVX2 is available, an optimized function is called,
based on Blue's algorithm. The fallback method based on sumsqv is used
otherwise.

- Scaling is used to avoid overflow and underflow.

- Works correctly for negative increments.

AMD-Internal: [CPUPL-2551]
Change-Id: I5d8976b29b5af463a8981061b2be907ea647123c
2022-09-20 06:05:01 -04:00