Commit Graph

3645 Commits

Author SHA1 Message Date
Dipal M Zambare
38a8008cd8 Enabled znver3 flag for zen3 architecture
znver3 flag will be enabled if compiler is AOCC Clang version 3.0
and configuration is zen3

Change-Id: Ie164f4d469bf3f8df31ccf8fed9f80dfc62efb39
AMD-Internal: [CPUPL-1353]
2020-12-04 12:28:22 +05:30
Field G. Van Zee
78aee79452 Allow amaxv testsuite module to run with dim = 0.
Details:
- Exit early from libblis_test_amaxv_check() when the vector dimension
  (length) of x is 0. This allows the module to run when the testsuite
  driver passes in a problem size of 0. Thanks to Meghana Vankadari for
  alerting us to this issue via #459.
- Note: All other testsuite modules appear to work with problem sizes
  of 0, except for the microkernel modules. I chose not to "fix" those
  modules because a failure (or segmentation fault, as happens in this
  case) is actually meaningful in that it alerts the developer that some
  microkernels cannot be used with k = 0. Specifically, the 'haswell'
  kernel set contains microkernels that preload elements of B. Those
  microkernels would need to be restructured to avoid preloading in
  order to support usage when k = 0.
2020-12-02 13:02:36 -06:00
Field G. Van Zee
92d2b12a44 Fixed obscure testsuite gemmt dependency bug.
Details:
- Fixed a bug in the gemmt testsuite module that only manifested when
  testing of gemmt is enabled but testing of gemv is disabled. The bug
  was due to a copy-paste error dating back to the introduction of gemmt
  in 88ad841.
2020-12-02 13:02:00 -06:00
Field G. Van Zee
b43dae9a5d Fixed copy-paste bugs in edge-case sup kernels.
Details:
- Fixed bugs in two sup kernels, bli_dgemmsup_rv_haswell_asm_1x6() and
  bli_dgemmsup_rd_haswell_asm_1x4(), which involved extraneous assembly
  instructions that were left over from when the kernels were first
  written. These instructions would cause segmentation faults in some
  situations where extra memory was not allocated beyond the end of
  the matrix buffers. Thanks to Kiran Varaganti for reporting these
  bugs and to Bhaskar Nallani for identifying the cause and solution.
2020-12-01 16:44:38 -06:00
Field G. Van Zee
11dfc176a3 Reorganized thread auto-factorization logic.
Details:
- Reorganized logic of bli_thread_partition_2x2() so that the primary
  guts were factored out into "fast" and "slow" variants. Then added
  logic to the "fast" variant that allows for more optimal thread
  factorizations in some situations where there is at least one factor
  of 2.
- Changed BLIS_THREAD_RATIO_M from 2 to 1 in bli_kernel_macro_defs.h and
  added comments to that file describing BLIS_THREAD_RATIO_? and
  BLIS_THREAD_MAX_?R.
- In bli_family_zen.h and bli_family_zen2.h, preprocessed out several
  macros not used in vanilla BLIS and removed the unused macro
  BLIS_ENABLE_ZEN_BLOCK_SIZES from the former file.
- Disabled AMD's small matrix handling entry points in bli_syrk_front.c
  and bli_trsm_front.c. (These branches of small matrix handling have
  not been reviewed by vanilla BLIS developers.)
- Added commented-out calls printf() to bli_rntm.c.
- Whitespace changes to bli_thread.c.
2020-12-01 19:51:27 +00:00
Meghana Vankadari
e083caf01d Merge "Correcting zdotc definition error for configs other than zen family" into amd-staging-milan-3.0 2020-12-01 06:20:10 -05:00
Dipal M Zambare
c2f63fcc54 Update amd64 bundle configuration
The configuration is updated to

   - Enable EPYC architecture optimizations
   - Macros to override block sizes.

AMD-Internal : [CPUPL-1350]

Change-Id: Id712f9abe6e81c9ece2baaab9d965b405e72977a
2020-12-01 14:37:13 +05:30
Meghana Vankadari
11b4cd8fc5 Correcting zdotc definition error for configs other than zen family
Details:
- when BLIS_CONFIG_EPYC is not defined, zdotc is defined twice.
  - One definition is part of macro based code.
  - Other definition is implemented as part of framework optimizations.
- Modified the bla_dot.c file to choose macro based code for configs
  other than zen family.

AMD-Internal: [CPUPL-1348]
Change-Id: I9ef6a590a6199e173d38248c3fb72feddfb20922
2020-12-01 13:33:59 +05:30
Devin Matthews
6d3bafacd7 Update BuildSystem.md
Add git version >= 1.8.5 requirement (see #462).
2020-11-28 17:17:56 -06:00
bhaskarn
91909c1562 Fix for segmentation crash in dgemmsup kernels
Description:

[AMD Internal]: CPUPL-1336

Removed extra/un-nesseary loads in dgemmmsup kernels which are
accessing the memory beyond the boundaries and causing segmentation
issue.

Kernels:
bli_dgemmsup_rd_haswell_asm_1x4
bli_dgemmsup_rv_haswell_asm_1x6

Change-Id: Idaeed36ebd9f13550943394a37e372b8d015b2d3
2020-11-24 10:15:57 -05:00
Kumar, Phani
477fc41fff Cmake script changes and blis.h changes for amd-staging-milan-3.0
AMD Internal : [CPUPL-1083]

Change-Id: Ia29a1f328ee32e2aec59a7fc70c04400d6ee6580
2020-11-24 06:12:25 -05:00
Dipal M Zambare
0a3d94c9a2 Updated test drivers for dotv, scalv and swapv.
Added traces in cblas layer for these API's.
These test drivers didn't have calls for complex data
types, the drivers are updated to support them.

AMD-Internal : [CPUPL-1315]

Change-Id: Ia52ecca68ea17314315d626b57c46a2f5973985b
2020-11-24 10:26:32 +05:30
Field G. Van Zee
64856ea5a6 Auto-reduce (by default) prime numbers of threads.
Details:
- When requesting multithreaded parallelism by specifying the total
  number of threads (whether it be via environment variable, globally at
  runtime, or locally at runtime), reduce the number of threads actually
  used by one if the original value (a) is prime and (b) exceeds a
  minimum threshold defined by the macro BLIS_NT_MAX_PRIME, which is set
  to 11 by default. If, when specifying the total number of threads (and
  not the individual ways of parallelism for each loop), prime numbers
  of threads are desired, this feature may be overridden by defining the
  BLIS_ENABLE_AUTO_PRIME_NUM_THREADS macro in the bli_family_*.h that
  corresponds to the configuration family targeted at configure-time.
  (For now, there is no configure option(s) to control this feature.)
  Thanks to Jeff Diamond for suggesting this change.
- Defined a new function in bli_thread.c, bli_is_prime(), that returns a
  bool that determines whether an integer is prime. This function is
  implemented in terms of existing functions in bli_thread.c.
- Updated docs/Multithreading.md to document the above feature, along
  with unrelated minor edits.
2020-11-23 16:54:51 -06:00
Meghana Vankadari
97753d8e6b Modified log routines for gemm, gemmt and trsm
Details:
- Modified log routines to accept inputs from blas layer instead of
  oapi level.

AMD-Internal: [CPUPL-1332]
Change-Id: If33c3585af92e617910ae8f7d442d1275119bbfc
2020-11-23 04:53:15 -05:00
Madan mohan Manokar
1d8fab0996 Test driver fix for her and her2
Fixed test driver code for her, her2
Support added to handle complex and double complex data type in test driver.

Change-Id: If65939e99d8cf77e0fb70561166d84bf67d0321d
AMD-Internal: [CPUPL-1326]
2020-11-23 04:10:43 -05:00
Dipal Madhukar Zambare
22270aa9e4 Merge "Added debug log and trace for gemv and dotv for blis and cblas interface" into amd-staging-milan-3.0 2020-11-23 03:51:48 -05:00
managalv
fdc0e70cd8 Added debug log and trace for gemv and dotv for blis and cblas interface
AMD Internal: [CPUPL-1314]

Change-Id: I2708fd9c73419c968c8e02ff11545645dc639052
2020-11-23 19:55:21 +05:30
Field G. Van Zee
55933b6ff6 Added missing attribution to docs/ReleaseNotes.md. 2020-11-20 10:39:32 -06:00
Kiran Varaganti
80a516382e Fixed wrong dimensions check in bench/bench_gemm.c application
Verifying the valid values of m, n, k, lda, ldb and ldc is removed.
Since the bench app is run on logs collected from AOCL traces.
The correct way of checking should consider transpose parameter and storage order.

Change-Id: If0fbf733c2650c6f328661293eb99d062685d638
2020-11-20 20:39:20 +05:30
Field G. Van Zee
e310f57b4b CHANGELOG update (0.8.0) 2020-11-19 13:33:37 -06:00
Field G. Van Zee
9b387f6d5a Version file update (0.8.0) 0.8.0 2020-11-19 13:33:37 -06:00
Madan Mohan Manokar
35d33bab6a Merge "Test driver fix for her, her2, herk and her2k" into amd-staging-milan-3.0 2020-11-19 05:47:31 -05:00
Madan mohan Manokar
38698f0dfd Test driver fix for her, her2, herk and her2k
Fixed test driver code for her, her2, herk and her2k function.
Above functions supports only complex and double complex data type, test code is updated accordingly.

Change-Id: Iee7b79abda4a2959a265c420d23879bf47f2c38d
AMD-Internal: [CPUPL-1313]
2020-11-19 12:58:21 +05:30
Field G. Van Zee
2928ec750d ReleaseNotes.md update in advance of next version.
Details:
- Updated docs/ReleaseNotes.md in preparation for next version.
2020-11-18 18:31:35 -06:00
Field G. Van Zee
b9899bedff CREDITS file update. 2020-11-18 16:52:41 -06:00
satish kumar nuggu
17f994bd15 Added Blas interface for ?imatcopy, ?omatcopy, ?omatadd, ?omatcopy2
AMD-Internal: [CPUPL-1116]
Original review was in this commit http://gerrit-git.amd.com/c/cpulibraries/er/blis/+/428165.
Added new commit for transpose API's

Change-Id: I322389cc0be0aaccf82d1d0bb4476beea8694cd8
2020-11-18 12:55:36 +05:30
Field G. Van Zee
9bb23e6c2a Added support for systemless build (no pthreads).
Details:
- Added a configure option, --[enable|disable]-system, which determines
  whether the modest operating system dependencies in BLIS are included.
  The most notable example of this on Linux and BSD/OSX is the use of
  POSIX threads to ensure thread safety for when application-level
  threads call BLIS. When --disable-system is given, the bli_pthreads
  implementation is dummied out entirely, allowing the calling code
  within BLIS to remain unchanged. Why would anyone want to build BLIS
  like this? The motivating example was submitted via #454 in which a
  user wanted to build BLIS for a simulator such as gem5 where thread
  safety may not be a concern (and where the operating system is largely
  absent anyway). Thanks to Stepan Nassyr for suggesting this feature.
- Another, more minor side effect of the --disable-system option is that
  the implementation of bli_clock() unconditionally returns 0.0 instead
  of the time elapsed since some fixed point in the past. The reasoning
  for this is that if the operating system is truly minimal, the system
  function call upon which bli_clock() would normally be implemented
  (e.g. clock_gettime()) may not be available.
- Refactored preprocess-guarded code in bli_pthread.c and bli_pthread.h
  to remove redundancies.
- Removed old comments and commented #include of "bli_pthread_wrap.h"
  from bli_system.h.
- Documented bli_clock() and bli_clock_min_diff() in BLISObjectAPI.md
  and BLISTypedAPI.md, with a note that both are non-functional when
  BLIS is configured with --disable-system.
2020-11-16 15:55:45 -06:00
Field G. Van Zee
88ad841434 Squash-merge 'pr' into 'squash'. (#457)
Merged contributions from AMD's AOCL BLIS (#448).
  
Details:
- Added support for level-3 operation gemmt, which performs a gemm on
  only the lower or upper triangle of a square matrix C. For now, only
  the conventional/large code path will be supported (in vanilla BLIS).
  This was accomplished by leveraging the existing variant logic for
  herk. However, some of the infrastructure to support a gemmtsup is
  included in this commit, including
  - A bli_gemmtsup() front-end, similar to bli_gemmsup().
  - A bli_gemmtsup_ref() reference handler function.
  - A bli_gemmtsup_int() variant chooser function (with variant calls
    commented out).
- Added support for inducing complex domain gemmt via the 1m method.
- Added gemmt APIs to the BLAS and CBLAS compatiblity layers.
- Added gemmt test module to testsuite.
- Added standalone gemmt test driver to 'test' directory.
- Documented gemmt APIs in BLISObjectAPI.md and BLISTypedAPI.md.
- Added a C++ template header (blis.hh) containing a BLAS-inspired
  wrapper to a set of polymorphic CBLAS-like function wrappers defined
  in another header (cblas.hh). These two headers are installed if
  running the 'install' target with INSTALL_HH is set to 'yes'. (Also
  added a set of unit tests that exercise blis.hh, although they are
  disabled for now because they aren't compatible with out-of-tree
  builds.) These files now live in the 'vendor' top-level directory.
- Various updates to 'zen' and 'zen2' subconfigurations, particularly
  within the context initialization functions.
- Added s and d copyv, setv, and swapv kernels to kernels/zen/1, and
  various minor updates to dotv and scalv kernels. Also added various
  sup kernels contributed by AMD to kernels/zen/3. However, these
  kernels are (for now) not yet used, in part because they caused
  AppVeyor clang failures, and also because I have not found time to
  review and vet them.
- Output the python found during configure into the definition of PYTHON
  in build/config.mk (via build/config.mk.in).
- Added early-return checks (A, B, or C with zero dimension; alpha = 0)
  to bli_gemm_front.c.
- Implemented explicit beta = 0 handling in for the sgemm ukernel in
  bli_gemm_armv7a_int_d4x4.c, which was previously missing. This latent
  bug surfaced because the gemmt module verifies its computation using
  gemm with its beta parameter set to zero, which, on a cortexa15 system
  caused the gemm kernel code to unconditionally multiply the
  uninitialized C data by beta. The C matrix likely contained
  non-numeric values such as NaN, which then would have resulted in a
  false failure.
- Fixed a bug whereby the implementation for bli_herk_determine_kc(),
  in bli_l3_blocksize.c, was inadvertantly being defined in terms of
  helper functions meant for trmm. This bug was probably harmless since
  the trmm code should have also done the right thing for herk.
- Used cpp macros to neutralize the various AOCL_DTL_TRACE_ macros in
  kernels/zen/3/bli_gemm_small.c since those macros are not used in
  vanilla BLIS.
- Added cpp guard to definition of bli_mem_clear() in bli_mem.h to
  accommodate C++'s stricter type checking.
- Added cpp guard to test/*.c drivers that facilitate compilation on
  Windows systems.
- Various whitespace changes.
2020-11-14 09:39:48 -06:00
Field G. Van Zee
234b8b0cf4 Increased dotxaxpyf testsuite thresholds.
Details:
- Increased the test thresholds used by the dotxaxpyf testsuite module
  by a factor of five in order to avoid residuals that unnecessarily
  fall in the MARGINAL range. This commit should fix #455. Thanks to
  @nagsingh for reporting this issue.
2020-11-12 19:11:16 -06:00
Dipal M Zambare
ce99b1ecef Added dynamic block size selection logic for DGEMM.
Block sizes (MC, KC, NC) for DGEMM are determined at runtime
based on following parameters

    - Single or multithreaded build
    - Processor Architecture (currently support only zen3)
    - Number of threads requested while running the library

Change-Id: Ia793484b77adb87486e630d0d3b4c7856ae52094
AMD-Internal: [CPUPL-660, CPUPL-661]
2020-11-12 22:40:38 +05:30
Dipal M Zambare
6abd193144 Corrected thread id generation in DTL for BLIS.
Added blis.h in aoclos.c in order to check if BLIS was
build with openmp support.

AOCL-Internal: [CPUPL-1238]

Change-Id: I366da030266b9d7f2ad09dc722847a7d86b85933
2020-11-12 09:13:15 +05:30
managalv
5a57eeadfa Disable 3m1 method for complex GEMM
Details:
Native method is being enabled for complex gemm
Need to run performance for large dataset to enable induced method

MD-Internal: [CPUPL-1300]

Change-Id: I5444dd31e8b8e73da73f789da8b64276e8e40de8
2020-11-11 19:57:59 +05:30
bhaskarn
008fe49df6 Added bench application for trsm
Description:
     Added bench_trsm.c to read inputs from AOCL DTL logs to benchmark
     Added sample input file

Change-Id: I6806e42244bf775cbed457553ca07fb0222ef597
2020-11-09 13:06:39 -05:00
Madan mohan Manokar
ac6dbdcdfb Fixing the logs
fixing data type issue in logs.

Change-Id: I3b9fb2921fd9db57a734c7a2866b53f1b51adfdb
AMD-Internal: [CPUPL-1249]
2020-11-09 20:39:23 +05:30
mkurumel
39f7a4eecf Add AOCL DTL logging.
Added logging for syr,syr2,syrk,syr2k,trmm,trmv,trsv.

	AMD-Internal: [CPUPL-1256]

Change-Id: I628ef5d48796cfc68ec68886b8c1b0555261b3d1
2020-11-09 14:40:43 +05:30
Madan mohan Manokar
bded7f9392 Log fix
Added function defintion of her2k

Change-Id: Ia7ccd72772cdcafdcf5cb8a21c6746b13c70b158
AMD-Internal: [CPUPL-1249]
2020-11-09 10:33:08 +05:30
Field G. Van Zee
ed612dd82c Updated README.md with sgemmsup blurb.
Details:
- Added an entry to the "What's New" section of the README.md to
  announce the availability of sgemmsup.
2020-11-07 13:09:42 -06:00
Field G. Van Zee
e14424f55b Merge branch 'dev' 2020-11-07 13:02:50 -06:00
Mangala V
1578e8b874 Merge "Optimised AXPYF routine for complex float and complex double" into amd-staging-milan-3.0 2020-11-06 02:05:02 -05:00
managalv
aae48c2221 Optimised AXPYF routine for complex float and complex double
Details:
    - Added SIMD code
    - Processing 5 rows at a time in SIMD loop to improve performance

AMD-Internal: [CPUPL-1054]

Change-Id: I2ac93f25895dccfc42e14be0689e6d4e655d6a0a
2020-11-06 18:42:13 +05:30
Dipal Madhukar Zambare
1fb9e1d029 Merge "Re-enable support for Intel 19+ compiler." into amd-staging-milan-3.0 2020-11-06 02:00:34 -05:00
Kiran Varaganti
a15e531374 Merge "Benchmark using AOCL Logs as input" into amd-staging-milan-3.0 2020-11-06 01:51:38 -05:00
Kiran Varaganti
60642d98a3 Benchmark using AOCL Logs as input
Added benchmark application for gemm - input is a log file generated from AOCL
DTL from BLIS.

Change-Id: I2ac7a3c48d5a37c5b24ec0f0cff7e7886dad0b99
2020-11-06 14:31:53 +05:30
Dipal M Zambare
4347d2d823 Re-enable support for Intel 19+ compiler.
Note that there is know issue with Intel 19+ as explained
in https://github.com/flame/blis/issues/371.

AMD version needs this support as some user applications
need ICC support.

AMD-Internal: [CPUPL-1223]

Change-Id: I86ddee068ae18bd940a5952d60960228d8100e97
2020-11-06 11:11:46 +05:30
Madan mohan Manokar
ec35717174 Logging
Added logging for her2k, her, herk, nrm2, symm, symv

Change-Id: Ib3af83b6f8aaafb69fb5d78e964c45504f74f79c
AMD-Internal: [CPUPL-1249]
2020-11-06 10:16:31 +05:30
managalv
68b4ff976b Added Function trace and Input logging for dotv and gemv
Change-Id: I992bd80b2322d6c387f609ecd70c1109c13f6254
AMD-Internal: [CPUPL-1274]
2020-11-06 03:53:43 +05:30
Nageshwar Singh
c40bb45bdf Added debug log and trace support for hemm
AMD-Internal: [CPUPL-1253]

Change-Id: I95e9a864800a09f24c94926936ada8ec8728f1a5
2020-11-05 18:31:41 +05:30
Nageshwar Singh
963277f8f9 Added debug log support for axpy, axpyb, amax, asum, hemv, her2
AMD-Internal: [CPUPL-1253]

Change-Id: I90cabed86a3796385656b34d368588500e9df71c
2020-11-03 20:44:12 +05:30
Meghana Vankadari
0775f09b41 Added debug trace and log support for copy and ger routines
Change-Id: Id7fb64c0a626b2f8f53e89ee7df4391693eb4f4c
2020-11-02 22:56:58 -05:00
Kiran Varaganti
65daaab6ac Fix Bug in DTL
When library is built as single thread and trace is enabled, the test
applications in test folder fail to compile. In the file aoclos.c the function
AOCL_gettid() uses "omp_get_thread_num() to get thread_id, which is only
enabled when OpenMP based parallel BLIS library is generated. To fix this in
single thread case we now return zero for thread id, openmp function is used
only when BLIS_ENABLE_OPENMP macro is defined. However this is not a complete
fix. If library is built with pthread, AOCL_gettid() always return 0, which is
not the intended behaviour.

Change-Id: I5b79ed57d27d0022d3dcab0e2a3a557c8e4ff8ee
2020-11-02 12:05:09 +05:30