Commit Graph

3645 Commits

Author SHA1 Message Date
Field G. Van Zee
2c554c2fce Redefined bool_t typedef in terms of C99 bool.
Details:
- Changed the typedef that defines bool_t from:

    typedef gint_t bool_t;

  where gint_t is a signed integer that forms the basis of most other
  integers in BLIS, to:

    typedef bool bool_t;

- Changed BLIS's TRUE and FALSE macro definitions from being in terms of
  integer literals:

    #define TRUE  1
    #define FALSE 0

  to being in terms of C99 boolean constants:

    #define TRUE  true
    #define FALSE false

  which are provided by stdbool.h.
- This commit constitutes the second phase of a transition toward using
  C99's bool instead of bool_t, which will address issue #420. The first
  phase, which cleaned up various typecasts in preparation for using
  bool as the basis for bool_t (instead of gint_t), was implemented by
  commit a69a4d7.
2020-07-24 15:57:19 -05:00
Field G. Van Zee
e01dd12558 Fail-safe updates to Makefiles in 'test' dir.
Details:
- Updated Makefiles in test, test/3, and test/sup so that running any of
  the usual targets without having first built BLIS results in a helpful
  error message. For example, if BLIS is not yet configured, make will
  output:

    Makefile:327: *** Cannot proceed: config.mk not detected! Run
    configure first.  Stop.

  Similarly, if BLIS is configured but not yet built, make will output:

    Makefile:340: *** Cannot proceed: BLIS library not yet built! Run
    make first.  Stop.

  In previous commits, these actions would result in a rather cryptic
  make error such as:

    make: *** No rule to make target 'test_sgemm_2400_asm_blis_st.x',
    needed by 'blis-nat-st'.  Stop.
2020-07-24 15:41:46 -05:00
Devin Matthews
b4f47f7540 Add BLIS_EXPORT_BLIS to bli_abort. (#429)
Fixes #428.
2020-07-24 13:56:13 -05:00
Dipal M Zambare
25d23cdda2 Zen3 support, disabled IR, JR loop parallelization
AMD-Internal: [CPUPL-1013]

Change-Id: I859152d63d1a56519c508dfa19587f25123e08b4
2020-07-24 20:55:47 +05:30
Meghana Vankadari
23ceeff7eb Using weighted thread range partitioning for GEMMT
Details:
- Since C is triangular, in order to maintain load balance among
  threads, we need to use weighted range partitioning.

Change-Id: I03d8ff71ac7af843acd787f1389b5907b56453ee
2020-07-24 19:27:54 +05:30
Meghana Vankadari
eae55852ba set the gemmt slot to the default gemmt sup handler for reference kernels
Change-Id: Ib309aba0cb08161877fd1a720ed65222d3b303f3
2020-07-24 19:27:33 +05:30
Field G. Van Zee
a69a4d7e2f Cleaned up bool_t usage and various typecasts.
Details:
- Fixed various typecasts in

    frame/base/bli_cntx.h
    frame/base/bli_mbool.h
    frame/base/bli_rntm.h
    frame/include/bli_misc_macro_defs.h
    frame/include/bli_obj_macro_defs.h
    frame/include/bli_param_macro_defs.h

  that were missing or being done improperly/incompletely. For example,
  many return values were being typecast as
    (bool_t)x && y
  rather than
    (bool_t)(x && y)
  Thankfully, none of these deficiencies had manifested as actual bugs
  at the time of this commit.
- Changed the return type of bli_env_get_var() from dim_t to gint_t.
  This reflects the fact that bli_env_get_var() needs to be able to
  return a signed integer, and even though dim_t is currently defined
  as a signed integer, it does not intuitively appear to necessarily be
  signed by inspection (i.e., an integer named "dim_t" for matrix
  "dimension"). Also, updated use of bli_env_get_var() within
  bli_pack.c to reflect the changed return type.
- Redefined type of thrcomm_t.barrier_sense field from bool_t to gint_t
  and added comments to the bli_thrcomm_*.h files that will explain a
  planned replacement of bool_t with C99's bool type.
- Note: These changes are being made to facilitate the substitution of
  'bool' for 'bool_t', which will eliminate the namespace conflict with
  arm_sve.h as reported in issue #420. This commit implements the first
  phase of that transition. Thanks to RuQing Xu for reporting this
  issue.
- CREDITS file update.
2020-07-22 16:13:09 -05:00
dzambare
9c7814da1c Added support for zen3 configuration
- User can now specify zen3 configuration,
      currently it reuses block sizes and kernels from zen2.
    - Auto configuration can detect and enable if zen3 config is needed
    - Added support for amd64 bundle which contains all zen platforms
    - Moved exiting amd bundle to amd64 legacy.

AMD-Internal: [CPUPL-500, CPUPL-1013]
Change-Id: I60b0b8abc6d2821c27ff0f5f6e032e889194b957
2020-07-22 18:24:26 +05:30
Field G. Van Zee
a6437a5c11 Replaced broken ref99 sandbox w/ simpler version.
Details:
- The 'ref99' sandbox was broken by multiple refactorings and internal
  API changes over the last two years. Rather than try to fix it, I've
  replaced it with a much simpler version based on var2 of gemmsup.
  Why not fix the previous implementation? It occurred to me that the
  old implementation was trying to be a lightly simplified duplication
  of what exists in the framework. Duplication aside, this sandbox
  would have worked fine if it had been completely independent of the
  framework code. The problem was that it was only partially
  independent, with many function calls calling a function in BLIS
  rather than a duplicated/simplified version within the sandbox. (And
  the reason I didn't make it fully independent to begin with was that
  it seemed unnecessarily duplicative at the time.) Maintaining two
  versions of the same implementation is problematic for obvious
  reasons, especially when it wasn't even done properly to begin with.
  This explains the reimplementation in this commit. The only catch is
  that the newer implementation is single-threaded only and does not
  perform any packing on either input matrix (A or B). Basically, it's
  only meant to be a simple placeholder that shows how you could plug
  in your own implementation. Thanks to Francisco Igual for reporting
  this brokenness.
- Updated the three reference gemmsup kernels (defined in
  ref_kernels/3/bli_gemmsup_ref.c) so that they properly handle
  conjugation of conja and/or conjb. The general storage kernel, which
  is currently identical to the column-storage kernel, is used in the
  new ref99 sandbox to provide basic support for all datatypes
  (including scomplex and dcomplex).
- Minor updates to docs/Sandboxes.md, including adding the threading
  and packing limitations to the Caveats section.
- Fixed a comment typo in bli_l3_sup_var1n2m.c (upon which the new
  sandbox implementation is based).
2020-07-20 19:21:07 -05:00
Devin Matthews
bca040be9d Merge pull request #425 from gmargari/patch-1
Update Multithreading.md
2020-07-20 09:27:30 -05:00
Giorgos Margaritis
171ecc1dc6 Update Multithreading.md 2020-07-20 12:24:06 +03:00
Field G. Van Zee
2605eb4d99 Added missing rv_d?x6 edge cases to sup kernel.
Details:
- Added support to bli_gemmsup_rv_haswell_asm_d6x8n.c for handling
  various n = 6 edge cases with a single sup kernel call. Previously,
  only n = {4,2,1} were handled explicitly as single kernel calls;
  that is, cases where n = 6 were previously being executed via two
  kernel calls (n = 4 and n = 2).
- Added commented debug line to testsuite's test_libblis.c.
2020-07-15 15:25:19 -05:00
Meghana Vankadari
6896f927da Fixed bug in SUP code path
Details:
- Since GEMM kernel prefers row-storage, if input C matrix is in col-major order,
  entire operation is transposed. In that case uplo(c) needs to be toggled
  before kernel-variant selection.
- disabled "bli_gemmsup_ref_var1n2m_opt_cases" inside gemmtsup.
- Updated version number  to 2.2.1

Change-Id: I0a85df1141fc4a98d98ea4e0c3d42db8602fa69b
2020-07-15 19:41:24 +05:30
nprasadm
af1f9ab98d BLIS: 'zdotc_' API modified to support Fortran invocation in flang environment.
1) Added dcomplex based zdotc_ version as a function with additional parameter.
2) The datatypes (single , double, Complex)  functions retained as the macros.
3) This modification handles the ZDOTC_ invocation from Fortran based application
   for 'double complex' datatypes.
4) The modifications are placed under macro 'AOCL_F2C'.
5) Blis, Blas Test suites verified ALL PASS with GCC and Flang
   + with and without 'AOCL_F2C' macro on Ubuntu machine.
6) Adding BLIS_EXPORT_BLAS to make the APIs visible when linking dll.

Change-Id: I4ada39a73f416e3794708f5b55e947342c261117
Signed-off-by: Meghana <Meghana.Vankadari@amd.com>, Nagendra <Nagendra.PrasadM@amd.com>
AMD-Internal: [SWLCSG-177]
2020-07-14 00:53:07 -04:00
Meghana Vankadari
6a0a65ee23 Added sup kernels and code path for gemmt similar to GEMM.GEMMT now also supports complex data types.
Details:
- Added framework code for GEMMT SUP.
- Implemented SUP for GEMMT using similar techniques as native path.
- Moved update routines to frame/util folder.
- Ported update routines for complex datatypes.

Change-Id: I17adfd0586d07f5a23dca6a07b2d48f4c9fcf71c
Signed-off-by: Meghana Vankadari <Meghana.Vankadari@amd.com>,
	       Dipal M Zambare <DipalMadhukar.Zambare@amd.com>,
	       Mangala V <managala.v@amd.com>
2020-07-13 16:26:32 +05:30
Meghana Vankadari
f59d4befb5 Added framework support and interface APIs for GEMMT
Details:
- Added new API Which Computes a matrix-matrix product with general matrices
  but updates only the upper or lower triangular part of the result matrix. 
  cblas_?gemmt() and ?gemmt_().
- These routines are similar to the ?gemm routines, but they only access
  and update a triangular part of the square result matrix.
- Added DGEMMT functionality by reusing GEMM kernels.
- Created a new folder for GEMMT under l3, and added GEMMT specific
  framework code.
- Modified cntl_create routine to choose different macro kernel for
  GEMMT.
- Added routines to copy lower/upper triangular part of a block to the
  buffer.
- Defined BLIS, BLAS and CBLAS interface APIs for GEMMT.
- Added test_gemmt.c to test folder and Updated the Makefile.
- Added a macro 'CBLAS' in test_gemm.c to call CBLAS APIs.

Change-Id: Ie00c1a15b9c654b65c687a9ca781cbc6f9641791
2020-07-06 00:51:16 -04:00
Field G. Van Zee
72f6ed0637 Declare/define static functions via BLIS_INLINE.
Details:
- Updated all static function definitions to use the cpp macro
  BLIS_INLINE instead of the static keyword. This allows blis.h to
  use a different keyword (inline) to define these functions when
  compiling with C++, which might otherwise trigger "defined but
  not used" warning messages. Thanks to Giorgos Margaritis for
  reporting this issue and Devin Matthews for suggesting the fix.
- Updated the following files, which are used by configure's
  hardware auto-detection facility, to unconditionally #define
  BLIS_INLINE to the static keyword (since we know BLIS will be
  compiled with C, not C++):
    build/detect/config/config_detect.c
    frame/base/bli_arch.c
    frame/base/bli_cpuid.c
- CREDITS file update.
2020-07-03 17:55:54 -05:00
Field G. Van Zee
5fc701ac5f Added -fomit-frame-pointer option to CKOPTFLAGS.
Details:
- Added the -fomit-frame-pointer compiler option to the CKOPTFLAGS
  variable in the following make_defs.mk files:
    config/haswell/make_defs.mk
    config/skx/make_defs.mk
  as well as comments that mention why the compiler option is needed.
  This option is needed to prevent the compiler from using the rbp
  frame register (in the very early portion of kernel code, typically
  where k_iter and k_left are defined and computed), which, as of
  1c719c9, is used explicitly by the gemmsup millikernels. Thanks to
  Devin Matthews for identifying this missing option and to Jeff
  Diamond for reporting the original bug in #417.
- The file
    config/zen/amd_config.mk
  which feeds into the make_defs.mk for both zen and zen2 subconfigs,
  was also touched, but only to add a commented-out compiler option
  (and the aforementioned explanatory comment) since that file already
  uses -fomit-frame-pointer in COPTFLAGS, which forms the basis of
  CKOPTFLAGS.
2020-07-01 15:48:58 -05:00
Field G. Van Zee
6af59b7057 Fixed disabled edge case optimization in gemmsup.
Details:
- Fixed an inadvertently disabled edge case optimization in the two
  gemmsup variants in bli_l3_sup_var1n2m.c. Background: These edge case
  optimizations allow the last millikernel operation in the jr loop to
  be executed with inflated an register blocksize if it is the last
  (or only) iteration. For example, if mr=6 and nr=8 and the gemmsup
  problem is m=8, n=100, k=100. (In this case, the panel-block variant
  (var1n) is executed, which places the jr loop in the m dimension.)
  In principle, this problem could be executed as two millikernels: one
  with dimensions 6x100x100, and one as 2x100x100. However, with the
  support for inflated blocksizes in the kernel, the entire 8x100x100
  problem can be passed to the millikernel function, which will then
  execute it more favorably as two 4x100x100 millikernel sub-calls.
  Now, this optimization is disabled under certain circumstances, such
  as when multithreading. Previously, the is_mt predicate was being set
  incorrectly such that it was non-zero even when running
  single-threaded.
- Upon fixing the is_mt issue above, another bit of code needed to be
  moved so that the result of the optimization could have an impact on
  the assignment of loop bounds ranges to threads.
2020-07-01 14:54:23 -05:00
Field G. Van Zee
b37634540f Support ldims, packing in sup/test drivers.
Details:
- Updated the test/sup source file (test_gemm.c) and Makefile to support
  building matrices with small or large leading dimensions, and updated
  runme.sh to support executing both kinds of test drivers.
- Updated runme.sh to allow for executing sup drivers with unpacked (the
  default) or packed matrices (via setting BLIS_PACK_A, BLIS_PACK_B
  environment variables), and for capturing output to files that encode
  both the leading dimension (small or large) and packing status into
  the filenames.
- Consolidated octave scripts in test/sup/octave_st, test/sup/octave_mt
  into test/sup/octave and updated the octave code in that consolidated
  directory to read the new output filename format (encoding ldim and
  packing). Also added comments and streamlined code, particularly in
  plot_panel_trxsh.m. Tested the octave scripts with octave 5.2.0.
- Moved old octave_st, octave_mt directories to test/sup/old.
2020-06-25 16:05:12 -05:00
Field G. Van Zee
32365b3ea5 Ensure random objects' 1-norms are non-zero.
Details:
- Fixed an innocuous bug that manifested when running the testsuite on
  extremely small matrices with randomization via the "powers of 2 in
  narrow precision range" option enabled. When the randomization
  function emits a perfect 0.0 to fill a 1x1 matrix, the testsuite will
  then compute 0.0/0.0 during the normalization process, which leads to
  NaN residuals. The solution entails smarter implementaions of randv,
  randnv, randm, and randnm, each of which will compute the 1-norm of
  the vector or matrix in question. If the object has a 1-norm of 0.0,
  the object is re-randomized until the 1-norm is not 0.0. Thanks to
  Kiran Varaganti for reporting this issue (#413).
- Updated the implementation of randm_unb_var1() so that it loops over
  a call to the randv_unb_var1() implementation directly rather than
  calling it indirectly via randv(). This was done to avoid the overhead
  of multiple calls to norm1v() when randomizing the rows/columns of a
  matrix.
- Updated comments.

Change-Id: I0e3d65ff97b26afde614da746e17ed33646839d1
AOCL-2.2 2.2
2020-06-19 15:40:55 +05:30
Field G. Van Zee
ceb9b95a96 Fixed incorrect link to shiftd in BLISTypedAPI.md.
Details:
- Previously, the entry for shiftd in the Operation index section of
  BLISTypedAPI.md was incorrectly linking to the shiftd operation entry
  in BLISObjectAPI.md. This has been fixed. Thanks to Jeff Diamond for
  helping find this incorrect link.
2020-06-18 17:15:25 -05:00
Field G. Van Zee
b3c4201681 CREDITS file update. 2020-06-18 14:00:56 -05:00
Isuru Fernando
31af73c11a Expand windows instructions (#414)
* Expand windows instructions

* Windows: both static and shared don't work at the same time
2020-06-18 13:35:54 -05:00
Field G. Van Zee
b5b604e106 Ensure random objects' 1-norms are non-zero.
Details:
- Fixed an innocuous bug that manifested when running the testsuite on
  extremely small matrices with randomization via the "powers of 2 in
  narrow precision range" option enabled. When the randomization
  function emits a perfect 0.0 to fill a 1x1 matrix, the testsuite will
  then compute 0.0/0.0 during the normalization process, which leads to
  NaN residuals. The solution entails smarter implementaions of randv,
  randnv, randm, and randnm, each of which will compute the 1-norm of
  the vector or matrix in question. If the object has a 1-norm of 0.0,
  the object is re-randomized until the 1-norm is not 0.0. Thanks to
  Kiran Varaganti for reporting this issue (#413).
- Updated the implementation of randm_unb_var1() so that it loops over
  a call to the randv_unb_var1() implementation directly rather than
  calling it indirectly via randv(). This was done to avoid the overhead
  of multiple calls to norm1v() when randomizing the rows/columns of a
  matrix.
- Updated comments.
2020-06-17 16:42:24 -05:00
Isuru Fernando
35e38fb693 FIx typo in FAQ 2020-06-16 09:08:31 -07:00
phakumar
ccf0772d6e BLIS library porting on to Windows:
This library ported on Windows 10 using CMake scripts and Visual Studio 2019 with clang compiler
 AMD internal:[CPUPL-657]

Change-Id: Ie701f52ebc0e0585201ba703b6284ac94fc0feb9
2020-06-16 18:29:00 +05:30
Dipal M Zambare
80b3127ff1 Added support for logging gemm input values.
Added BLIS specific extension to AOCL DTL, in this
added support to print the input matrix sizes from BLIS
library.

AMD Internal: [CPUPL-806]

Change-Id: I80ed779d65f9b1c48466137fc2f05629fa2fb561
2020-06-15 14:21:22 +05:30
Dipal M Zambare
dad7e2f235 Added support multiple trace levels & optimization of file size requirements
Multiple trace levels will allow user to set the nested call levels
up to which the traces to be limited. It will also reduce file size
requirements.

Also optimized auto trace output to reduce file size by removing
thread ID's from individual lines.

AMD Internal: [CPUPL-806]

Change-Id: I28e08a5bdf1b147469d8ce290ff7cde7f74481bd
2020-06-10 16:00:49 +05:30
prangana
3620e472e3 Replace back major version number variable in Makefile
Change-Id: I0f902e32085058ec618d08470793f5e5e49719b3
2020-06-10 13:11:14 +05:30
Dipal M Zambare
305c744131 Added traces in dgemm and sgemm paths.
Added traces from blas/cblas API's till kernels for dgemm and sgemm.
By default the traces will be disabled, user need to enable them
in their local workspace, please check aocl_dtl/aocldtlcf.h file.

AMD Internal : CPUPL-806

Change-Id: I83b310509fb1a599c114387192bcf882ef0480f9
2020-06-08 12:01:22 +05:30
Field G. Van Zee
1c719c91a3 Bugfixes, cleanup of sup dgemm ukernels.
Details:
- Fixed a few not-really-bugs:
  - Previously, the d6x8m kernels were still prefetching the next upanel
    of A using MR*rs_a instead of ps_a (same for prefetching of next
    upanel of B in d6x8n kernels using NR*cs_b instead of ps_b). Given
    that the upanels might be packed, using ps_a or ps_b is the correct
    way to compute the prefetch address.
  - Fixed an obscure bug in the rd_d6x8m kernel that, by dumb luck,
    executed as intended even though it was based on a faulty pointer
    management. Basically, in the rd_d6x8m kernel, the pointer for B
    (stored in rdx) was loaded only once, outside of the jj loop, and in
    the second iteration its new position was calculated by incrementing
    rdx by the *absolute* offset (four columns), which happened to be the
    same as the relative offset (also four columns) that was needed. It
    worked only because that loop only executed twice. A similar issue
    was fixed in the rd_d6x8n kernels.
- Various cleanups and additions, including:
  - Factored out the loading of rs_c into rdi in rd_d6x8[mn] kernels so
    that it is loaded only once outside of the loops rather than
    multiple times inside the loops.
  - Changed outer loop in rd kernels so that the jump/comparison and
    loop bounds more closely mimic what you'd see in higher-level source
    code. That is, something like:
      for( i = 0; i < 6; i+=3 )
    rather than something like:
      for( i = 0; i <= 3; i+=3 )
  - Switched row-based IO to use byte offsets instead of byte column
    strides (e.g. via rsi register), which were known to be 8 anyway
    since otherwise that conditional branch wouldn't have executed.
  - Cleaned up and homogenized prefetching a bit.
  - Updated the comments that show the before and after of the
    in-register transpositions.
  - Added comments to column-based IO cases to indicate which columns
    are being accessed/updated.
  - Added rbp register to clobber lists.
  - Removed some dead (commented out) code.
  - Fixed some copy-paste typos in comments in the rv_6x8n kernels.
  - Cleaned up whitespace (including leading ws -> tabs).
  - Moved edge case (non-milli) kernels to their own directory, d6x8,
    and split them into separate files based on the "NR" value of the
    kernels (Mx8, Mx4, Mx2, etc.).
  - Moved config-specific reference Mx1 kernels into their own file
    (e.g. bli_gemmsup_r_haswell_ref_dMx1.c) inside the d6x8 directory.
  - Added rd_dMx1 assembly kernels, which seems marginally faster than
    the corresponding reference kernels.
  - Updated comments in ref_kernels/bli_cntx_ref.c and changed to using
    the row-oriented reference kernels for all storage combos.
2020-06-04 17:21:08 -05:00
Meghana
9fce1ec4a4 Optimized SGEMV kernel and changed BLAS interface call
Details:
- Optimized saxpyf kernel with fuse_factor=5 and iter_unroll=2.
- Modified framework files of sgemv to remove dependency on cntx
variable.
- Updated cntx_init file of zen2 to choose optimized kernels.
- Modified BLAS interface call for SGEMV to reduce framework overhread.
- Currently these changes are applicable for zen2 configuration.

Change-Id: Iabc36ae640e82e65f8764f3c6dee513ad64b22fd
Signed-off-by: Meghana Vankadari <Meghana.Vankadari@amd.com>
AMD-Internal: [CPUPL-707]
2020-06-04 02:49:08 -04:00
Dipal Madhukar Zambare
8a367c993e Merge "Checking for zero dimension is moved to bli_gemm_xx call." into amd-staging-rome-2.2 2020-06-04 02:16:56 -04:00
Meghana
f4d2bb2fed Enabled AOCC specific flags for all versions of AOCC compiler
Change-Id: Icad0ff1c1858c1762792ba8f2c5c3e846909cbb5
2020-06-03 10:50:00 -04:00
dzambare
5d57d67cb3 Checking for zero dimension is moved to bli_gemm_xx call.
This will ensure early return in case full gemm processing is not needed.

Based on dimension which is found to be zero following actions will be taken:

If 'c' has zero dimension, no further processing is requried
If alpha is zero or if 'a' or 'b' has zero diemension, we
perform scalm operation instead of gemm. (c = alpha*a + beta*b)

Change-Id: Icc031944fc4e80138adf991974547f2d57ab570b
AMD-Internal: [CPUPL-904]
2020-06-03 16:50:11 +05:30
managalv
b4e599ecc2 CPUPL-929: Improve Complex GEMM performance - Support all storage formats and non Transpose/Conjugate Matrices
Failure was seen in libflame function (FLASH_UDdate_UT_inc)
Due to typecasting double complex pointer as double pointer

Change-Id: If6e2f4663575450a13a9a07dddd5622628f5c6b0
2020-06-02 22:27:54 +05:30
Nallani Bhaskar
6f01cd2c54 Fix for sblat3.x failure in make check
Details:
Using of ymm registers storing 8 float values than 4 floats values
Changed register from ymm to xmm in required places. This can be found
only when leading dimension is greater than the actual dimension.

Change-Id: I39f04eac18c4fa3a8c93048c977d6a83aa92b800
2020-06-01 17:04:59 +05:30
managalv
f7bc37ea32 CPUPL-929: Improve Complex GEMM performance - Support all storage formats and non Transpose/Conjugate Matrices
Details
Added Support of N SUP kernel for complex float and complex double
Removed prefetching in M SUP kernels for complex float and complex double
Removed all warnings

Change-Id: I05ffde0f0613681927fe7576db7f5f1a4486fd05
2020-06-01 06:24:12 -04:00
Kiran Varaganti
c8f3cec5f7 Merge "Code cleanup in 6xk DGEMM pack Kernel" into amd-staging-rome-2.2 2020-06-01 05:08:58 -04:00
Nallani Bhaskar
5e0ad13f8e Code Cleanup and replaced vzeroall with vxorps
Change-Id: I74c2cc2183a407aad86eab5c3285c33690de9abd
2020-06-01 10:14:06 +05:30
Nallani Bhaskar
2413c31672 CPUPL-923: Implemented dot Product Kernels in SGEMM SUP for transpose cases.
Details:
Added two new kernels bli_sgemmsup_rd_zen_asm_6x16m and bli_sgemmsup_rd_zen_asm_6x16n
to support dot product in Row Major (A * Tranpose(B)) and in Column Major (Tranpose(A) * B)

Change-Id: I264fd75c4c4b68fb7dc4fd229eaa44d09e9f3432
2020-05-31 22:37:03 +05:30
Kiran Varaganti
3ebd5f8aa0 Code cleanup in 6xk DGEMM pack Kernel
Removed conditional check if(*kappa_cast==0.0) in 6xk dgemm packing kernel

Change-Id: Ie543787133d303aeb2532e67b83d6ba96e3d558e
2020-05-31 21:41:45 +05:30
prangana
711f26129e Update AMD BLIS version to 2.2
Also updated Makefile to fix issue of multiple symbolic links being
created

Change-Id: Ie9a680cedd5c96fcd7f6af1ce0f849a58c3ed4d3
2020-05-31 21:37:32 +05:30
Kiran Varaganti
f8ddd48594 Code Clean-up in DGEMM packing kernels
Removed conditional check for (*kappa_cast == 1.0) because its always 1.0 in
DGEMM packing kernels.
[CPUPL-636]

Change-Id: Ib04f2a3cdbb0f138036a8b0486d1dec073e40407
2020-05-30 21:55:29 +05:30
prangana
0c52aaefe1 Merge branch 'ref/heads/amd-staging-rome-2.2' of ssh://git.amd.com:29418/cpulibraries/er/blis into amd-staging-rome-2.2
Change-Id: I46acf48354ff73fb4eaeac255132d21095ea4d98
2020-05-30 10:31:10 +05:30
prangana
bb7eeec843 Change loop test expression in bli_packm_zen_int.c
PRAGMA SIMD loop has issues with test expression (k !=0)
Changed usage to (k > 0)

Change-Id: I50204dbd0194de43f0d6cdcbfc586bb16aa25968
2020-05-30 10:00:21 +05:30
Kiran Varaganti
739803a441 DGEMM Packing Kernels for Native DGEMM implementation
[CPUPL-858] Packing kernels for dgemm 6x8 kernel are added explicitly
for zen2 configuration. Apart from generic packing kernels used by level-3
routines and for all combinations of the input parameters, introduced DGEMM
specific packing kernels for the case op(A) & op(B) is no transpose. This
helps us to vectorize these packing kernels and eliminate un-necessary branch
conditional checks. The packed kernels are also optimized at the boundary.
These boundary condition optimization help when the input matrix dimensions
"m" and "n" are not multiples of register block-sizes "MR & NR".
Typical DGEMM operation is C = beta*C + alpha *op(A) * op(B). Kindly note
the multiplication with alpha is handled inside kernel, hence in these dgemm
packing routines alpha is always consider 1.0. These routines are
"bli_dpackm_8xk_nn_zen" & "bli_dpackm_6xk_nn_zen". The generic packing
routines
are "bli_dpackm_6xk_gen_zen" & bli_dpackm_8xk_gen_zen". These routines are
enabled from "bli_cntx_init_zen2()" through bli_cntx_set_packm_kers(). In this
checkout wthe generic packing kernels are enabled by default". Later will
introduce run-time mechanism to change these packing kernels based on the
DGEMM input parameters.

Change-Id: I079b4dce0757d558224cb8c55d024bfea6a4de91
2020-05-28 02:01:43 -04:00
managalv
9b09dd7d6c CPUPL-929:Improve Complex GEMM performance
Added context for CCR format

Change-Id: I81ac1b882f176235b1c48f4952ec30f44c6b138c
2020-05-23 11:10:35 +05:30
managalv
154bedc785 CPUPL-929:Improve Complex GEMM performance
Removed print which was part of kernel

Change-Id: I288e0151ba8da8d6dd4415734c88ed3474ba3a5b
2020-05-22 14:39:12 +05:30