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969ceb7413
Add macros to allow specific code options to be enabled or disabled, controlled by options to configure and cmake. This expands on the existing GEMM and/or TRSM functionality to enable/disable SUP handling and replaces the hard coded #define in include files to enable small matrix paths. All options are enabled by default for all BLIS sub-configs but many of them are currently only implemented in AMD specific framework code variants. AMD-Internal: [CPUPL-6906] --------- Co-authored-by: Varaganti, Kiran <Kiran.Varaganti@amd.com>
58 lines
2.4 KiB
C
58 lines
2.4 KiB
C
/*
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BLIS
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An object-based framework for developing high-performance BLAS-like
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libraries.
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Copyright (C) 2021 - 2025, Advanced Micro Devices, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name(s) of the copyright holder(s) nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef BLIS_FAMILY_AMDZEN_H
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#define BLIS_FAMILY_AMDZEN_H
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#include "bli_config_zen.h"
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#include "bli_config_zen4.h"
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#include "bli_config_zen5.h"
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// By default, it is effective to parallelize the outer loops.
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// Setting these macros to 1 will force JR and IR inner loops
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// to be not parallelized.
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#define BLIS_THREAD_MAX_IR 1
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#define BLIS_THREAD_MAX_JR 1
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// This will select the threshold below which small matrix code will be called.
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#define BLIS_SMALL_MATRIX_THRES 700
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#define BLIS_SMALL_M_RECT_MATRIX_THRES 160
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#define BLIS_SMALL_K_RECT_MATRIX_THRES 128
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// When running HPL with pure MPI without DGEMM threading (Single-threaded
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// BLIS), defining this macro as 1 yields better performance.
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#define AOCL_BLIS_MULTIINSTANCE 0
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#endif
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