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ed5010d65b
Standardize format of AMD copyright notice. AMD-Internal: [CPUPL-3519] Change-Id: I98530e58138765e5cd5bc0c97500506801eb0bf0
158 lines
4.8 KiB
C
158 lines
4.8 KiB
C
/*
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BLIS
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An object-based framework for developing high-performance BLAS-like
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libraries.
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Copyright (C) 2014, The University of Texas at Austin
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Copyright (C) 2019 - 2023, Advanced Micro Devices, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name(s) of the copyright holder(s) nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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//#ifndef BLIS_FAMILY_H
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//#define BLIS_FAMILY_H
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#if 0
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// -- LEVEL-3 MICRO-KERNEL CONSTANTS AND DEFINITIONS ---------------------------
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// -- sgemm micro-kernel --
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#if 0
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#define BLIS_SGEMM_UKERNEL bli_sgemm_asm_4x24
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#define BLIS_DEFAULT_MC_S 256
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#define BLIS_DEFAULT_KC_S 256
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#define BLIS_DEFAULT_NC_S 4080
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#define BLIS_DEFAULT_MR_S 4
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#define BLIS_DEFAULT_NR_S 24
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#define BLIS_SGEMM_UKERNEL_PREFERS_CONTIG_ROWS
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#endif
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#if 1
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#define BLIS_SGEMM_UKERNEL bli_sgemm_asm_6x16
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#define BLIS_DEFAULT_MC_S 144
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#define BLIS_DEFAULT_KC_S 256
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#define BLIS_DEFAULT_NC_S 4080
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#define BLIS_DEFAULT_MR_S 6
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#define BLIS_DEFAULT_NR_S 16
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#define BLIS_SGEMM_UKERNEL_PREFERS_CONTIG_ROWS
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#endif
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#if 0
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#define BLIS_SGEMM_UKERNEL bli_sgemm_asm_16x6
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#define BLIS_DEFAULT_MC_S 144
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#define BLIS_DEFAULT_KC_S 256
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#define BLIS_DEFAULT_NC_S 4080
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#define BLIS_DEFAULT_MR_S 16
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#define BLIS_DEFAULT_NR_S 6
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#endif
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// -- dgemm micro-kernel --
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#if 0
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#define BLIS_DGEMM_UKERNEL bli_dgemm_asm_4x12
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#define BLIS_DEFAULT_MC_D 152
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#define BLIS_DEFAULT_KC_D 160
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#define BLIS_DEFAULT_NC_D 4080
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#define BLIS_DEFAULT_MR_D 4
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#define BLIS_DEFAULT_NR_D 12
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#define BLIS_DGEMM_UKERNEL_PREFERS_CONTIG_ROWS
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#endif
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#if 1
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#define BLIS_DGEMM_UKERNEL bli_dgemm_asm_6x8
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#define BLIS_DEFAULT_MC_D 72
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#define BLIS_DEFAULT_KC_D 256
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#define BLIS_DEFAULT_NC_D 4080
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#define BLIS_DEFAULT_MR_D 6
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#define BLIS_DEFAULT_NR_D 8
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#define BLIS_DGEMM_UKERNEL_PREFERS_CONTIG_ROWS
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#endif
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#if 0
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#define BLIS_DGEMM_UKERNEL bli_dgemm_asm_8x6
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#define BLIS_DEFAULT_MC_D 72
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#define BLIS_DEFAULT_KC_D 256
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#define BLIS_DEFAULT_NC_D 4080
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#define BLIS_DEFAULT_MR_D 8
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#define BLIS_DEFAULT_NR_D 6
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#endif
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// -- cgemm micro-kernel --
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#if 1
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#define BLIS_CGEMM_UKERNEL bli_cgemm_asm_3x8
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#define BLIS_DEFAULT_MC_C 144
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#define BLIS_DEFAULT_KC_C 256
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#define BLIS_DEFAULT_NC_C 4080
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#define BLIS_DEFAULT_MR_C 3
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#define BLIS_DEFAULT_NR_C 8
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#define BLIS_CGEMM_UKERNEL_PREFERS_CONTIG_ROWS
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#endif
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#if 0
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#define BLIS_CGEMM_UKERNEL bli_cgemm_asm_8x3
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#define BLIS_DEFAULT_MC_C 144
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#define BLIS_DEFAULT_KC_C 256
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#define BLIS_DEFAULT_NC_C 4080
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#define BLIS_DEFAULT_MR_C 8
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#define BLIS_DEFAULT_NR_C 3
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#endif
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// -- zgemm micro-kernel --
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#if 1
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#define BLIS_ZGEMM_UKERNEL bli_zgemm_asm_3x4
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#define BLIS_DEFAULT_MC_Z 72
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#define BLIS_DEFAULT_KC_Z 256
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#define BLIS_DEFAULT_NC_Z 4080
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#define BLIS_DEFAULT_MR_Z 3
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#define BLIS_DEFAULT_NR_Z 4
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#define BLIS_ZGEMM_UKERNEL_PREFERS_CONTIG_ROWS
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#endif
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#if 0
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#define BLIS_ZGEMM_UKERNEL bli_zgemm_asm_4x3
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#define BLIS_DEFAULT_MC_Z 72
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#define BLIS_DEFAULT_KC_Z 256
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#define BLIS_DEFAULT_NC_Z 4080
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#define BLIS_DEFAULT_MR_Z 4
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#define BLIS_DEFAULT_NR_Z 3
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#endif
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#endif
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//#endif
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