Rayan, Rohan d512e3a736 Converting mul+add to FMA for ddot, daxpy and daxpyf zen kernels ...

- Replace mul+add with FMA for ddot, daxpy and daxpyf
- Using masked operations where possible
- Non-unit stride code paths still use scalar loops, but use FMAs for accuracy

AMD-Internal: CPUPL-8055
Co-authored-by: Rohan Rayan rohrayan@amd.com

2026-03-20 11:07:12 +05:30

..

bli_axpy2v_zen_int.c

Code cleanup: spelling corrections

2024-08-05 16:18:51 -04:00

bli_axpyf_zen_int_4.c

Standardize Zen kernel names

2025-08-19 18:19:51 +01:00

bli_axpyf_zen_int_5.c

Converting mul+add to FMA for ddot, daxpy and daxpyf zen kernels

2026-03-20 11:07:12 +05:30

bli_axpyf_zen_int_6.c

Bugfix : Changing fuse factor for the call to vectorized SAXPYF kernel

2023-11-03 01:37:43 -04:00

bli_axpyf_zen_int_8.c

Converting mul+add to FMA for ddot, daxpy and daxpyf zen kernels

2026-03-20 11:07:12 +05:30

bli_dotxaxpyf_zen_int_8.c

Code cleanup: spelling corrections

2024-08-05 16:18:51 -04:00

bli_dotxf_zen_int_8.c

Ensure Accumulation Consistency Across DOTXF and DOTXV kernels (#325)

2026-03-03 16:38:55 +05:30