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509aa07785
Naming of Zen kernels and associated files was inconsistent with BLIS conventions for other sub-configurations and between different Zen generations. Other anomalies existed, e.g. dgemmsup 24x column preferred kernels names with _rv_ instead of _cv_. This patch renames kernels and file names to address these issues. AMD-Internal: [CPUPL-6579]
98 lines
3.3 KiB
C
98 lines
3.3 KiB
C
/*
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BLIS
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An object-based framework for developing high-performance BLAS-like
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libraries.
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Copyright (C) 2024 - 2025, Advanced Micro Devices, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name(s) of the copyright holder(s) nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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// DCOPYV kernel
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COPYV_KER_PROT( double, d, copyv_zen5_asm )
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// Dgemm sup RV kernels
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GEMMSUP_KER_PROT( double, d, gemmsup_cv_zen5_asm_24x8m)
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GEMMSUP_KER_PROT( double, d, gemmsup_cv_zen5_asm_24x7m)
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GEMMSUP_KER_PROT( double, d, gemmsup_cv_zen5_asm_24x6m)
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GEMMSUP_KER_PROT( double, d, gemmsup_cv_zen5_asm_24x5m)
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GEMMSUP_KER_PROT( double, d, gemmsup_cv_zen5_asm_24x4m)
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GEMMSUP_KER_PROT( double, d, gemmsup_cv_zen5_asm_24x3m)
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GEMMSUP_KER_PROT( double, d, gemmsup_cv_zen5_asm_24x2m)
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GEMMSUP_KER_PROT( double, d, gemmsup_cv_zen5_asm_24x1m)
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// threshold functions
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bool bli_cntx_gemmsup_thresh_is_met_zen5
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(
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obj_t* a,
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obj_t* b,
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obj_t* c,
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cntx_t* cntx
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);
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// dynamic blocksizes function
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void bli_dynamic_blkszs_zen5
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(
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dim_t n_threads,
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cntx_t* cntx,
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num_t dt
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);
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err_t bli_trsm_small_zen5
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(
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side_t side,
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obj_t *alpha,
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obj_t *a,
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obj_t *b,
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cntx_t *cntx,
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cntl_t *cntl,
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bool is_parallel
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);
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TRSMSMALL_KER_PROT( d, trsm_small_zen5_int_XAltB_XAuB )
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TRSMSMALL_KER_PROT( d, trsm_small_zen5_int_XAutB_XAlB )
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TRSMSMALL_KER_PROT( d, trsm_small_zen5_int_AltXB_AuXB )
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TRSMSMALL_KER_PROT( d, trsm_small_zen5_int_AutXB_AlXB )
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TRSMSMALL_KER_PROT( z, trsm_small_zen5_int_XAltB_XAuB )
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TRSMSMALL_KER_PROT( z, trsm_small_zen5_int_XAutB_XAlB )
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TRSMSMALL_KER_PROT( z, trsm_small_zen5_int_AltXB_AuXB )
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TRSMSMALL_KER_PROT( z, trsm_small_zen5_int_AutXB_AlXB )
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#ifdef BLIS_ENABLE_OPENMP
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err_t bli_trsm_small_zen5_mt
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(
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side_t side,
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obj_t *alpha,
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obj_t *a,
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obj_t *b,
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cntx_t *cntx,
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cntl_t *cntl,
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bool is_parallel
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);
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#endif
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