Kiran 961d9d509d Re-add BLIS_ENABLE_ZEN_BLOCK_SIZES macro for 'zen'. ...

Details:
- Added previously-deleted cpp macro block to bli_cntx_init_zen.c 
  targeting the Naples microarchitecture that enabled different cache 
  blocksizes when the number of threads exceeds 16. This commit 
  represents PR #573.

2021-12-07 15:30:38 -06:00

..

old

This check in has changes w.r.t Copyright information, which is changed to (start year) - 2019

2019-05-27 16:24:43 +05:30

amd_config.mk

Squash-merge 'pr' into 'squash'. (#457)

2020-11-14 09:39:48 -06:00

bli_cntx_init_zen.c

Re-add BLIS_ENABLE_ZEN_BLOCK_SIZES macro for 'zen'.

2021-12-07 15:30:38 -06:00

bli_family_zen.h

Re-add BLIS_ENABLE_ZEN_BLOCK_SIZES macro for 'zen'.

2021-12-07 15:30:38 -06:00

make_defs.mk

Added support for AMD's Zen3 microarchitecture.

2021-11-17 13:02:00 -06:00

make_defs.mk.old

Added support for AMD's Zen3 microarchitecture.

2021-11-17 13:02:00 -06:00