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1416ab6b5ed2f8bdcbfb11f9d1a47a07b22ed9f9
blis/kernels
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Eleni Vlachopoulou 1416ab6b5e Bugfix on the memory access for nrm2 AVX2 implementations. 
- Since the definition of negative increments is different between BLAS and BLIS,
  there was bug on how the memory was accessed when we were copying the elements
  of a vector with negative increments. Updated the code under the assumption that
  when negative increments are set, the vector is being accessed starting from the end.
  For the BLAS interface, there is an intermediate conversion before calling into the blis layer.

Change-Id: I08343472b418733fad6f7add9e90aa96cdf68285
AMD-Internal: [SWLCSG-1900]
2023-03-08 04:21:36 -05:00
..
armsve
New kernel set for Arm SVE using assembly (#396)
2020-05-21 11:56:45 +05:30
armv7a
Squash-merge 'pr' into 'squash'. (#457)
2020-11-14 09:39:48 -06:00
armv8a
avoid loading twice in armv8a gemm kernel (#403)
2020-05-21 12:37:53 +05:30
bgq
Replaced use of bool_t type with C99 bool.
2020-08-03 11:27:13 +05:30
bulldozer
Remove UT-Austin from copyright headers' clause 3.
2018-12-04 14:31:06 -06:00
generic
Added a dummy file to kernels/generic.
2017-11-21 12:34:20 -06:00
haswell
Obliterated usage of rbp register in SUP gemm kernel
2023-03-01 11:09:57 -05:00
knc
Remove UT-Austin from copyright headers' clause 3.
2018-12-04 14:31:06 -06:00
knl
Type saga continues; fixed sgemm ukernel signature.
2020-09-12 17:48:15 -05:00
old
Remove UT-Austin from copyright headers' clause 3.
2018-12-04 14:31:06 -06:00
penryn
Optionally disable trsm diagonal pre-inversion.
2020-12-04 16:08:15 -06:00
piledriver
BLIS library porting on to Windows:
2020-06-16 18:29:00 +05:30
power7
Remove UT-Austin from copyright headers' clause 3.
2018-12-04 14:31:06 -06:00
power9
Add POWER10 support to BLIS (#450)
2020-09-29 16:52:18 -05:00
power10
Fixed bug in power10 microkernel I/O. (#488)
2021-03-30 19:07:42 -05:00
sandybridge
Remove UT-Austin from copyright headers' clause 3.
2018-12-04 14:31:06 -06:00
skx
Bug Fix to replace vzeroall
2022-07-22 03:42:17 -04:00
zen
Bugfix on the memory access for nrm2 AVX2 implementations.
2023-03-08 04:21:36 -05:00
zen2
BLIS:merge:
2021-04-27 11:09:48 +05:30
zen3
Added support for zen3 configuration
2020-07-22 18:24:26 +05:30
zen4
Added AVX512 DTRSM small RLNN/RUTN variant kernels
2023-02-28 01:40:03 +05:30
CMakeLists.txt
Added support for AVX512 for Windows and AMAVX
2022-06-08 11:09:48 +05:30