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1f9d1a85d3
* Updated aocl_batch_gemm_ APIs aligning to CBLAS batch API. - Modified Batch-Gemm API to align with cblas_?gemm_batch_ API, and added a parameter group_size to the existing APIs. - Updated bench batch_gemm code to align to the new API definition. - Modified the hardcoded number in lpgemm_postop file. - Added necessary early return condition to account for group_count/group_size < 0. AMD-Internal: [ SWLCSG - 3592 ]
24 lines
846 B
Plaintext
24 lines
846 B
Plaintext
f32f32f32of32:group_count=1
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group_size=3
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r t t n n 92 1479 589 92 589 1479 scale=vector,zp=vector,bias=na,clip
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s8s8s32obf16:group_count=1
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group_size=5
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r n n n r 67 21 1823 1823 21 21 scale=vector,zp=scalar,relu,clip
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f32f32f32of32:group_count=1
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group_size=7
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r n t n n 43 2240 1553 1553 1553 2240 scale=vector,zp=scalar,relu,clip
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bf16bf16f32obf16:group_count=1
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group_size=6
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r n n n r 79 2676 1995 1995 2676 2676 bias=na,swish
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bf16bf16f32of32:group_count=1
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group_size=6
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r t n n r 143 1943 730 143 1943 1943 bias=na,clip
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bf16s4f32of32:group_count=1
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group_size=6
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r t n n r 79 1177 1968 79 1177 1177 scale=vector,zp=scalar,relu,clip
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bf16s4f32obf16:group_count=1
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group_size=6
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r n n n r 17 2714 468 468 2714 2714 scale=vector,zp=vector,bias=na
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s8s8s32obf16:group_count=1
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group_size=4
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r n n n n 43 2240 1553 1553 2240 2240 scale=vector,zp=scalar,relu,clip |