Harihara Sudhan S 15bd0f9646 Added AVX512 based double and float AXPYV ...

- Added AVX512 based double and float AXPYV which will be used in
  Zen4 context.
- Added n <= 0 check and alpha == 0 check to the BLAS layer of
  SAXPY.
- Modified BLAS framework of float AXPYV to remove flag check and
  pick kernels based on architecture ID.
- AVX512 kernel is disabled for other Zen configurations using
  BLIS_KERNELS_ZEN4 macro.

AMD-Internal: [CPUPL-2793]
Change-Id: Ie6a0976c2cfcf81ae5125f5f9aad14477d4ebbd1

2023-04-14 01:06:57 -04:00

..

1

Added AVX512 based double and float AXPYV

2023-04-14 01:06:57 -04:00

1m

Added AVX512 flag for d24xk pack kernel for windows

2023-04-09 22:38:33 +05:30

3

Added DTRSM Small Path AVX512 based LUNN/LLTN Variant Kernels

2023-04-13 01:44:31 -04:00

lpgemm

Masked load/store to replace copy macros in u8s8s32 micro-kernels.

2023-04-13 09:17:26 -04:00

bli_kernels_zen4.h

Added AVX512 based double and float AXPYV

2023-04-14 01:06:57 -04:00

CMakeLists.txt

Integrated 32x6 DGEMM kernel for zen4 and its related changes are added.

2023-01-19 23:11:36 +05:30