Meghana Vankadari 79e174ff0a Level-3 triangular routines now use different block sizes and kernels. ...

Details:
    - Eliminated the need for override function in SUP for GEMMT/SYRK.
    - New set of block sizes, kernels and kernel preferences
      are added to cntx data structure for level-3 triangular routines.
    - Added supporting functions to set and get the above parameters from cntx.
    - Modified GEMMT/SYRK SUP code to use these new block sizes/kernels.
      In case they are not set, use the default block sizes/kernels of
      Level-3 SUP.

AMD-Internal: [CPUPL-3649]
Change-Id: Iee11bd4c4f1d8fbbb749c296258d1b8121c009a0

2023-07-26 01:26:11 -04:00

..

1

Fixed bug in scal2v reference

2023-02-05 23:11:51 -05:00

1f

AOCL Windows: 3.1 BLIS changes

2021-03-08 19:04:17 +05:30

1m

Integrated 32x6 DGEMM kernel for zen4 and its related changes are added.

2023-01-19 23:11:36 +05:30

3

BLIS:merge:

2021-04-27 11:09:48 +05:30

ind

BLIS:merge:

2021-04-27 11:09:48 +05:30

bli_cntx_ref.c

Level-3 triangular routines now use different block sizes and kernels.

2023-07-26 01:26:11 -04:00

CMakeLists.txt

Added support for zen4 architecture

2021-11-23 10:29:15 +05:30