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-Currently only one eltwise post-op (one of relu/prelu/gelu_tanh/ gelu_erf) is supported in the post-op struct along with bias or downscale. This setup was sufficient when only activation functions were supported as eltwise post-ops. But with the introduction of clip post-op(a type of non-activation eltwise operation), it has become necessary to extend the post-ops framework to support multiple eltwise operations, with the multiple eltwise often used in the form activation eltwise op + non-activation eltwise ops. The aocl post-op struct is modified and the post-op parser is updated to support this use case. -The lpgemm_bench is updated to support testing/benchmarking of the multiple eltwise operations use case. The function for accuracy checking is modified to support correctness testing irrespective of the order and count of post-ops. Additionally the help message is updated so as to better describe the capabilities of lpgemm_bench. AMD-Internal: [CPUPL-3244] Change-Id: If4ce8d7261d32073da8fa4757ed4f2ea0e94249f