Shubham Sharma 26bd265cfd Optimized DTRSV for tiny sizes ...

- Replaced switch case with if else, lookup table for switch case
  is palced at the end of .text section which causes a huge jump.
- Reduced number of branches for tiny sizes.
- Cpuid query is slow, therefore added a new if statement which avoids cpuid
  query for tiny sizes(<200).
- Redirected tiny sizes to AVX2 kernel.

AMD-Internal: [CPUPL-5407]
Change-Id: I8e73777b2f00c9dcff9775ddfcb7ca3f74fa901c

2025-01-30 01:23:09 -05:00

..

other

Removed export macros from all internal prototypes.

2020-08-03 11:47:18 +05:30

bli_trsv_unb_var1.c

Export functions without def file (#303)

2020-08-03 11:46:07 +05:30

bli_trsv_unb_var2.c

Export functions without def file (#303)

2020-08-03 11:46:07 +05:30

bli_trsv_unf_var1_amd.c

Added AVX512 kernels for DAXPYF and DDOTXF

2024-05-03 05:10:22 -04:00

bli_trsv_unf_var1.c

Removed Arch specific code from BLIS framework.

2022-01-18 11:51:08 +05:30

bli_trsv_unf_var2_amd.c

Optimized DTRSV for tiny sizes

2025-01-30 01:23:09 -05:00

bli_trsv_unf_var2.c

Removed Arch specific code from BLIS framework.

2022-05-17 18:08:56 +05:30

bli_trsv_var_oapi.c

Export functions without def file (#303)

2020-08-03 11:46:07 +05:30

bli_trsv_var.h

Removed export macros from all internal prototypes.

2020-08-03 11:47:18 +05:30

bli_trsv.h

Remove UT-Austin from copyright headers' clause 3.

2018-12-04 14:31:06 -06:00