Balasubramanian, Vignesh 54ac36c8bc Bugfix: BF16 to F32 conversion in AVX2 F32 codepath ...

- Updated the conversion function(in case of receiving
  column stored inputs) from BF16 to F32, in order to
  use the correct strides while storing.

- Conversion of B is potentially multithreaded using
  the threads meant for IC compute. With the wrong
  strides in the kernel, this gives rise to incorrect
  writes onto the miscellaneous buffer.

AMD-Internal: [CPUPL-7675]

Co-authored-by: Vishal-A <Vishal.Akula@amd.com>
Co-authored-by: Vignesh Balasubramanian <vignbala@amd.com>

2025-12-01 15:06:13 +05:30

..

armsve

Merge commit 'cfa3db3f' into amd-main

2024-07-08 06:09:11 -04:00

armv7a

Add explicit handling for beta == 0 in armsve sd and armv7a d gemm ukrs.

2021-09-29 16:43:38 -05:00

armv8a

Armv8 Trash New Bulk Kernels

2021-10-08 02:35:58 +09:00

bgq

Replaced use of bool_t type with C99 bool.

2020-08-03 11:27:13 +05:30

bulldozer

Code cleanup: Copyright notices

2024-08-05 15:35:08 -04:00

generic

Added a dummy file to kernels/generic.

2017-11-21 12:34:20 -06:00

haswell

GCC 15 SUP kernel workaround (2)

2025-09-04 17:14:06 +01:00

knc

Remove UT-Austin from copyright headers' clause 3.

2018-12-04 14:31:06 -06:00

knl

Code cleanup: Copyright notices

2024-08-05 15:35:08 -04:00

old

Remove UT-Austin from copyright headers' clause 3.

2018-12-04 14:31:06 -06:00

penryn

Optionally disable trsm diagonal pre-inversion.

2020-12-04 16:08:15 -06:00

piledriver

Code cleanup: Miscellaneous fixes

2024-08-06 06:56:01 -04:00

power7

Remove UT-Austin from copyright headers' clause 3.

2018-12-04 14:31:06 -06:00

power9

Merge commit 'e366665c' into amd-main

2023-10-18 09:09:54 -04:00

power10

Code cleanup: No newline at end of file

2023-04-21 10:02:48 -04:00

sandybridge

BLIS: Missing clobbers (batch 7)

2023-11-22 17:51:46 -05:00

skx

Code cleanup: Copyright notices

2024-08-05 15:35:08 -04:00

zen

Bugfix: BF16 to F32 conversion in AVX2 F32 codepath

2025-12-01 15:06:13 +05:30

zen2

Code cleanup: AMD copyright notice

2023-11-23 08:54:31 -05:00

zen3

Added support for zen3 configuration

2020-07-22 18:24:26 +05:30

zen4

Added Fast path for single threaded AVX512 DGEMV kernel #260

2025-11-10 10:32:36 +05:30

zen5

Fix: Resolve Operator Precedence Warning in Zen5 DCOMPLEX Threshold Logic

2025-10-24 14:23:23 +05:30

CMakeLists.txt

Renaming CMAKE_SOURCE_DIR to PROJECT_SOURCE_DIR so that BLIS can be built properly via FetchContent() (#65)

2025-08-07 15:51:59 +01:00