satish kumar nuggu 754627eae9 Addressed uninitialized variables in trsm small algo ...

1. Addressed uninitialized variables reported in coverity for all
datatypes of trsm small algo.

AMD-Internal: [CPUPL-2542]
Change-Id: Ifae57ef6435493942732526720e6a9d6bec70e71

2022-09-29 01:49:22 -04:00

..

armsve

New kernel set for Arm SVE using assembly (#396)

2020-05-21 11:56:45 +05:30

armv7a

Squash-merge 'pr' into 'squash'. (#457)

2020-11-14 09:39:48 -06:00

armv8a

avoid loading twice in armv8a gemm kernel (#403)

2020-05-21 12:37:53 +05:30

bgq

Replaced use of bool_t type with C99 bool.

2020-08-03 11:27:13 +05:30

bulldozer

Remove UT-Austin from copyright headers' clause 3.

2018-12-04 14:31:06 -06:00

generic

Added a dummy file to kernels/generic.

2017-11-21 12:34:20 -06:00

haswell

DGEMMT optimizations

2022-08-19 12:31:35 -04:00

knc

Remove UT-Austin from copyright headers' clause 3.

2018-12-04 14:31:06 -06:00

knl

Type saga continues; fixed sgemm ukernel signature.

2020-09-12 17:48:15 -05:00

old

Remove UT-Austin from copyright headers' clause 3.

2018-12-04 14:31:06 -06:00

penryn

Optionally disable trsm diagonal pre-inversion.

2020-12-04 16:08:15 -06:00

piledriver

BLIS library porting on to Windows:

2020-06-16 18:29:00 +05:30

power7

Remove UT-Austin from copyright headers' clause 3.

2018-12-04 14:31:06 -06:00

power9

Add POWER10 support to BLIS (#450)

2020-09-29 16:52:18 -05:00

power10

Fixed bug in power10 microkernel I/O. (#488)

2021-03-30 19:07:42 -05:00

sandybridge

Remove UT-Austin from copyright headers' clause 3.

2018-12-04 14:31:06 -06:00

skx

Bug Fix to replace vzeroall

2022-07-22 03:42:17 -04:00

zen

Addressed uninitialized variables in trsm small algo

2022-09-29 01:49:22 -04:00

zen2

BLIS:merge:

2021-04-27 11:09:48 +05:30

zen3

Added support for zen3 configuration

2020-07-22 18:24:26 +05:30

zen4

DAMAXV AXX512 micro kernel bug fix.

2022-06-13 10:52:53 +05:30

CMakeLists.txt

Added support for AVX512 for Windows and AMAVX

2022-06-08 11:09:48 +05:30