Nallani Bhaskar e328bdc549 Added prefetch in left cases of dtrsm small ...

Details:

1. Added prefetching next micro-panel of A and B in dgemm block,
   which are helping in reducing load latency and improved performance.

2. Removed unnecessary unrolls in gemm loops and moved 8x6,6x8 core
   dgemm into macros and made it more modular

3. Packing and diagonal packing in main dgemm loops are modularized.
   Fringe cases are yet to modularize.

4. Updated dtrsm small thresholds for single and multi thread cases

5. Updated div/scale based on disable/enable of trsm pre-inversion

6. Code clean up

Change-Id: I5de16805ff050a31d2b424bb3f6ae0a4019332df

2021-06-15 23:15:22 +05:30

..

sup

Bug fix in sgemmsup 1x16n kernel

2021-04-28 21:33:30 +05:30

bli_dgemm_ref_k1.c

Added a basic dgemm implementation for smaller matrices.

2021-02-15 09:43:47 +05:30

bli_gemm_small.c

BLIS:merge:

2021-04-27 11:09:48 +05:30

bli_gemm_sqp.c

Enabling 3m_sqp and 3m1 methods

2021-04-22 02:47:31 -04:00

bli_syrk_small.c

Code review + tweaks to AMD's AOCL 2.0 PR (#349).

2019-10-11 10:24:24 -05:00

bli_trsm_small.c

Added prefetch in left cases of dtrsm small

2021-06-15 23:15:22 +05:30

CMakeLists.txt

AOCL Windows: 3.1 BLIS changes

2021-03-08 22:32:13 +05:30