V, Varsha 98901847f1 Enabled GEMV path for BF16 GEMV operations on non-BF16 supporting machines ...

- Added new GEMV_AVX2 5-Loop for handling BF16 inputs, for n = 1 and m = 1 conditions.
 - Modified Re-order and Un-reorder functions to cater to default n=1 reorder conditions.
 - Added bf16 beta and store support in F32 GEMV N AVX2 and 256_512 kernels.
 - Added bf16 beta support for F32 GEMV M kernels, and modified bf16 store conditions for
   GEMV M kernels.
 -  Modified the n=1 re-order guards for reference bf16 re-order API.
 - Added an additional path in the un-reorder case for handling n=1 vector conversion

AMD-Internal: [ SWLCSG - 3602 ]

2025-07-09 19:45:40 +05:30

..

lpgemm_pack_bf16.h

Enabled GEMV path for BF16 GEMV operations on non-BF16 supporting machines

2025-07-09 19:45:40 +05:30