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7394aafd1e
-New packing kernels for A matrix, both based on AVX512 and AVX2 ISA, for both row and column major storage are added as part of this change. Dependency on haswell A packing kernels are removed by this. -Tiny GEMM thresholds are further tuned for BF16 and F32 APIs. AMD-Internal: [SWLCSG-3380, SWLCSG-3415] Change-Id: I7330defacbacc9d07037ce1baf4a441f941e59be
83 lines
2.7 KiB
C
83 lines
2.7 KiB
C
/*
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BLIS
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An object-based framework for developing high-performance BLAS-like
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libraries.
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Copyright (C) 2022 - 2025, Advanced Micro Devices, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name(s) of the copyright holder(s) nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef BLIS_GEMM_INT8_PACKA
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#define BLIS_GEMM_INT8_PACKA
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// The strides needs to be updated based on the m_fringe value to account
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// for different schemas used to pack A fringe cases.
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BLIS_INLINE void get_packa_strides_mfringe_u8s8s32os32
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(
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const dim_t rs,
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const dim_t cs,
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dim_t* rs_use,
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dim_t* cs_use,
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dim_t MR,
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dim_t m_fringe
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)
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{
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// Only applicable for row major packing.
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if ( ( rs != 1 ) && ( cs == 1 ) && ( ( *cs_use ) > MR ))
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{
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( *rs_use ) = 4;
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( *cs_use ) = ( ( *cs_use ) / MR ) * m_fringe;
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}
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}
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typedef void (*packa_s32)
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(
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uint8_t*,
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const uint8_t*,
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const dim_t,
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const dim_t,
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const dim_t,
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const dim_t,
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dim_t*,
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dim_t*
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);
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void packa_u8s8s32os32
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(
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uint8_t* pack_a_buffer_u8s8s32o32,
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const uint8_t* a,
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const dim_t rs,
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const dim_t cs,
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const dim_t MC,
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const dim_t KC,
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dim_t* rs_a,
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dim_t* cs_a
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);
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#endif //BLIS_GEMM_INT8_PACKA
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