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- Following optimizations are included for dgemm 6x8 native kernel. 1) Reorganized the C update and store to reduce register dependencies. 2) moved the C prefetch to part-way through the kernel for efficiently prefetching C matrix at appropriate distance. 3) Offsetting A matrix, so that kernel can use a smaller instruction encoding saving, saving i-cache space. 4) Aligned the K iteration loop. - Thanks to Moore, Branden <Branden.Moore@amd.com> for these design changes of DGEMM 6x8 native kernels. - Additional change, reorganization of C update and store for beta zero case to facilitate out of order execution of storing of C matrix. Change-Id: I9d1ec8d39f1154b0f38b136bd6a04b05d7d1e6ba