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* Adding a model to determine which matrices enter the SGEMM tiny path * This extends the sizes of matrices that enter the tiny path, which was constrained to the L1 cache size previously * Now matrices that fit in L2 are also allowed into the tiny path, provided they are determined to be faster than the SUP path * Adding thresholds based on the SUP path sizes * Added for Zen4 and Zen5 --------- AMD-Internal: CPUPL-7555 Co-authored-by: Rohan Rayan <rohrayan@amd.com>