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b5c1b6055a
Description: Implemented sigmoid, tanh as fused post-ops in aocl_gemm_bf16bf16f32o<f32|bf16) API's Sigmoid(x) = 1/1+e^(-x) Tanh(x) = (1-e^(-2x))/(1+e^(2x)) Updated bench_lpgemm to recognize sigmod, tanh as options for post-ops from bench_input and verified. AMD-Internal: [SWLCSG-3178] Change-Id: I78a3ba4a67ab63f9d671fbe315f977b016a0d969
148 lines
3.6 KiB
C
148 lines
3.6 KiB
C
/*
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BLIS
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An object-based framework for developing high-performance BLAS-like
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libraries.
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Copyright (C) 2022 - 2024, Advanced Micro Devices, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name(s) of the copyright holder(s) nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef AOCL_GEMM_POST_OPS_H
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#define AOCL_GEMM_POST_OPS_H
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#define AOCL_MAX_POST_OPS 8
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#define AOCL_MAX_PRE_OPS 1
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typedef enum
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{
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RELU = 0,
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PRELU = 1,
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GELU_TANH = 2,
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GELU_ERF = 3,
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CLIP = 4,
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SWISH = 5,
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TANH = 6,
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SIGMOID = 7,
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} AOCL_ELT_ALGO_TYPE;
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typedef enum
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{
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SUM = 1,
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ELTWISE = 2,
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BIAS = 3,
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SCALE = 4,
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MATRIX_ADD = 5,
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MATRIX_MUL = 6,
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} AOCL_POST_OP_TYPE;
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typedef struct
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{
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void* alpha;
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void* beta;
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AOCL_ELT_ALGO_TYPE algo_type;
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} aocl_eltwise_algo;
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typedef struct
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{
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bool is_power_of_2;
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void* scale_factor;
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void* buff;
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void* zero_point;
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dim_t scale_factor_len;
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dim_t zero_point_len;
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} aocl_post_op_sum; // Also use for scale.
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typedef struct
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{
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bool is_power_of_2;
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void* scale_factor;
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dim_t scale_factor_len;
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aocl_eltwise_algo algo;
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} aocl_post_op_eltwise;
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typedef struct
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{
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void* bias;
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} aocl_post_op_bias;
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typedef struct
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{
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void* matrix;
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dim_t ldm;
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} aocl_post_op_matrix_add;
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typedef struct
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{
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void* matrix;
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dim_t ldm;
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} aocl_post_op_matrix_mul;
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typedef struct
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{
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void* zero_point;
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//len should be one which is one or n i.e., one zp
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//per tensor or one zp per channel respectively
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dim_t zero_point_len;
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} aocl_pre_op_zp;
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typedef struct
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{
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void* scale_factor;
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//len should be one which is one or n i.e., one sf
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//per tensor or one sf per channel respectively
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dim_t scale_factor_len;
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} aocl_pre_op_sf;
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typedef struct
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{
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aocl_pre_op_zp *b_zp;
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aocl_pre_op_sf *b_scl;
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dim_t seq_length;
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} aocl_pre_op;
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typedef struct
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{
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aocl_post_op_sum* sum; // Multiple scale/sum allowed.
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aocl_post_op_eltwise* eltwise; // Multiple eltwise allowed.
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aocl_post_op_bias* bias;
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aocl_post_op_matrix_add* matrix_add;
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aocl_post_op_matrix_mul* matrix_mul;
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// eg: seq_length = 2
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dim_t seq_length;
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// eg: seq_vector[0] = BIAS, seq_vector[1] = ELTWISE means bias followed
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// by eltwise(relu, if AOCL_ELT_ALGO_TYPE = 1).
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AOCL_POST_OP_TYPE* seq_vector;
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//Pass pre-op structure also through post-ops
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aocl_pre_op *pre_ops;
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} aocl_post_op;
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#endif //AOCL_GEMM_POST_OPS_H
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