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1. New LPGEMM type - S8S8S32/S8 is added. 2. New interface, frame and kernel files are added. 3. Frame and kernel files added/modified for S8S8S32/S8 have 2 operations - Pack B and Mat Mul 4. Pack B kernel routines to pack B matrix for VNNI and compute the sum of every column of B matrix to implement the S8S8S32 operation using the VNNI instructions. 5. Mat Mul Kernel files to compute the GEMM output using the VNNI. Here the A matrix elements are converted from int8 to uint8 (VNNI works with A matrix type uint8 only). 6. Post GEMM computation, additional operations are performed on the accumulated outputs to get the correct results. 7. With this change, two new LPGEMM APIs are introduced in LPGEMM - s8s8s32os32 and s8s8s32os8. 8. All previously added post-ops are supported on S8S8S32/S8 also. AMD-Internal: [CPUPL-3154] Change-Id: Ib18f82bde557ea4a815a63adc7870c4234bfb9d3
128 lines
5.1 KiB
C
128 lines
5.1 KiB
C
/*
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BLIS
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An object-based framework for developing high-performance BLAS-like
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libraries.
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Copyright (C) 2023, Advanced Micro Devices, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name(s) of the copyright holder(s) nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef LPGEMM_FUNC_MAP_H
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#define LPGEMM_FUNC_MAP_H
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// The XMACRO follows the format ID,FUNC_PTR:
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// ID = One of the AOCL_OPERATION_TYPE enum.
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// FUNC_PTR = Kernel associated with the AOCL_OPERATION_TYPE.
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// It is to be noted that the main macros are defined for combinations
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// of ISA types, and in case a kernel is not implemented for a particualr
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// ISA combination, the reference kernel should be set as FUNC_PTR.
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// TODO: Add reference kernels for BF16/VNNI kernels for ISA combinations
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// that is not supported.
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// Genoa
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#define LPGEMM_KERN_FUNC_MAP_AVX512_VNNI_BF16 \
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KMACRO(U8S8S16OS16, lpgemm_rowvar_u8s8s16o16_6x32) \
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KMACRO(U8S8S32OS32, lpgemm_rowvar_u8s8s32o32_6x64) \
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KMACRO(F32F32F32OF32, lpgemm_rowvar_f32f32f32of32_avx512_6x64m) \
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KMACRO(BF16BF16F32OF32, lpgemm_rowvar_bf16bf16f32of32_6x64) \
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KMACRO(S8S8S32OS32, lpgemm_rowvar_s8s8s32os32_6x64) \
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#define LPGEMM_PACKA_FUNC_MAP_AVX512_VNNI_BF16 \
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PAMACRO(U8S8S16OS16, NULL) \
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PAMACRO(U8S8S32OS32, packa_k64_u8s8s32o32) \
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PAMACRO(BF16BF16F32OF32, NULL) \
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PAMACRO(S8S8S32OS32, packa_k64_s8s8s32os32) \
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#define LPGEMM_PACKB_FUNC_MAP_AVX512_VNNI_BF16 \
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PBMACRO(U8S8S16OS16, packb_nr32_u8s8s16o16) \
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PBMACRO(U8S8S32OS32, packb_nr64_u8s8s32o32) \
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PBMACRO(BF16BF16F32OF32, packb_nr64_bf16bf16f32of32) \
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PBMACRO(S8S8S32OS32, packb_nr64_s8s8s32os32) \
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// Icelake
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#define LPGEMM_KERN_FUNC_MAP_AVX512_VNNI \
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KMACRO(U8S8S16OS16, lpgemm_rowvar_u8s8s16o16_6x32) \
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KMACRO(U8S8S32OS32, lpgemm_rowvar_u8s8s32o32_6x64) \
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KMACRO(F32F32F32OF32, lpgemm_rowvar_f32f32f32of32_avx512_6x64m) \
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KMACRO(BF16BF16F32OF32, lpgemm_rowvar_bf16bf16f32of32_6x64) \
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KMACRO(S8S8S32OS32, lpgemm_rowvar_s8s8s32os32_6x64) \
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#define LPGEMM_PACKA_FUNC_MAP_AVX512_VNNI \
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PAMACRO(U8S8S16OS16, NULL) \
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PAMACRO(U8S8S32OS32, packa_k64_u8s8s32o32) \
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PAMACRO(BF16BF16F32OF32, NULL) \
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PAMACRO(S8S8S32OS32, packa_k64_s8s8s32os32) \
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#define LPGEMM_PACKB_FUNC_MAP_AVX512_VNNI \
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PBMACRO(U8S8S16OS16, packb_nr32_u8s8s16o16) \
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PBMACRO(U8S8S32OS32, packb_nr64_u8s8s32o32) \
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PBMACRO(BF16BF16F32OF32, packb_nr64_bf16bf16f32of32) \
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PBMACRO(S8S8S32OS32, packb_nr64_s8s8s32os32) \
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// Skylake
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#define LPGEMM_KERN_FUNC_MAP_AVX512 \
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KMACRO(U8S8S16OS16, lpgemm_rowvar_u8s8s16o16_6x32) \
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KMACRO(U8S8S32OS32, lpgemm_rowvar_u8s8s32o32_6x64) \
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KMACRO(F32F32F32OF32, lpgemm_rowvar_f32f32f32of32_avx512_6x64m) \
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KMACRO(BF16BF16F32OF32, lpgemm_rowvar_bf16bf16f32of32_6x64) \
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KMACRO(S8S8S32OS32, lpgemm_rowvar_s8s8s32os32_6x64) \
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#define LPGEMM_PACKA_FUNC_MAP_AVX512 \
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PAMACRO(U8S8S16OS16, NULL) \
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PAMACRO(U8S8S32OS32, packa_k64_u8s8s32o32) \
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PAMACRO(BF16BF16F32OF32, NULL) \
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PAMACRO(S8S8S32OS32, packa_k64_s8s8s32os32) \
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#define LPGEMM_PACKB_FUNC_MAP_AVX512 \
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PBMACRO(U8S8S16OS16, packb_nr32_u8s8s16o16) \
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PBMACRO(U8S8S32OS32, packb_nr64_u8s8s32o32) \
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PBMACRO(BF16BF16F32OF32, packb_nr64_bf16bf16f32of32) \
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PBMACRO(S8S8S32OS32, packb_nr64_s8s8s32os32) \
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// Milan, Haswell
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#define LPGEMM_KERN_FUNC_MAP_AVX2 \
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KMACRO(U8S8S16OS16, lpgemm_rowvar_u8s8s16o16_6x32) \
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KMACRO(U8S8S32OS32, NULL) \
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KMACRO(F32F32F32OF32, lpgemm_rowvar_f32f32f32of32_6x16m) \
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KMACRO(BF16BF16F32OF32, NULL) \
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KMACRO(S8S8S32OS32, NULL) \
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#define LPGEMM_PACKA_FUNC_MAP_AVX2 \
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PAMACRO(U8S8S16OS16, NULL) \
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PAMACRO(U8S8S32OS32, NULL) \
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PAMACRO(BF16BF16F32OF32, NULL) \
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PAMACRO(S8S8S32OS32, NULL) \
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#define LPGEMM_PACKB_FUNC_MAP_AVX2 \
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PBMACRO(U8S8S16OS16, packb_nr32_u8s8s16o16) \
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PBMACRO(U8S8S32OS32, NULL) \
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PBMACRO(BF16BF16F32OF32, NULL) \
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PBMACRO(S8S8S32OS32, NULL) \
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#endif //LPGEMM_FUNC_MAP_H
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