satish kumar nuggu
c0d16f70e4
Added CBLAS API interface and memory alignment check
...
Details:
1. Added CBLAS API in test_gemm.c and test_trsm.c
2. Creating matrixes with memory aligned leading dimensions irrespective of dimension.
3. Shifting powers of 2 aligned memory to non-powers of 2 by adding extra cache line size at the end.
AMD-Internal: [CPUPL-1500] [CPUPL-1450]
Change-Id: I4180cec29b62d0388b974abee3e9b699cce3af6a
2021-04-26 13:44:30 +05:30
..
2020-05-21 11:54:53 +05:30
2020-08-06 10:09:29 +05:30
2019-08-23 14:18:08 +05:30
2020-08-03 11:27:13 +05:30
2020-08-06 10:09:29 +05:30
2020-08-06 10:09:29 +05:30
2020-08-03 11:27:13 +05:30
2021-03-08 19:04:17 +05:30
2020-11-18 12:55:36 +05:30
2019-11-04 13:57:12 -06:00
2020-11-02 12:05:09 +05:30
2020-10-04 22:17:31 +05:30
2020-11-02 12:05:09 +05:30
2020-10-13 01:43:55 -04:00
2020-11-02 22:56:58 -05:00
2021-04-06 15:38:12 +05:30
2020-10-29 17:06:30 +05:30
2020-10-07 06:55:08 -04:00
2021-04-26 13:44:30 +05:30
2020-07-13 16:26:32 +05:30
2020-11-06 18:42:13 +05:30
2020-11-02 22:56:58 -05:00
2020-06-16 18:29:00 +05:30
2020-06-16 18:29:00 +05:30
2020-11-23 04:10:43 -05:00
2020-11-19 12:58:21 +05:30
2020-11-23 04:10:43 -05:00
2020-11-19 12:58:21 +05:30
2020-11-18 12:55:36 +05:30
2020-11-18 12:55:36 +05:30
2020-11-18 12:55:36 +05:30
2020-11-18 12:55:36 +05:30
2020-11-24 10:26:32 +05:30
2020-11-24 10:26:32 +05:30
2020-06-16 18:29:00 +05:30
2020-06-16 18:29:00 +05:30
2021-04-26 13:44:30 +05:30
2020-06-16 18:29:00 +05:30