Shubham Sharma 1833ee70cd Fixed bug in bli_dgemm_avx512 8x24 native kernel. ...

-  Data-type of m, n, k,ldc is dim_t which will be int32_t for LP64 case.
-  When loading 64-bit registers using "mov" instructions, mov(rax, var(m)),
   the "m" should be 64-bit otherwise incorrect values gets loaded.

Fix: We typecast these variables to int64_t before loading into registers.

AMD-Internal: [CPUPL-5819]
Change-Id: I16043ac168a79ff9358c0c1768989a81e3c6b0e0

2024-09-23 04:54:04 -04:00

..

3

Fixed bug in bli_dgemm_avx512 8x24 native kernel.

2024-09-23 04:54:04 -04:00

aocl_smart

Tuning the decision logic to choose SUP vs Native for ZGEMM

2024-08-03 19:08:07 +05:30

bli_kernels_zen5.h

DGEMM SUP Optimizations for Turin

2024-08-02 04:00:51 -04:00