blis/kernels/zen4 at dbd0c069d406c4954667957db340f5d2e53fc1d2 - blis

amd/blis

mirror of https://github.com/amd/blis.git synced 2026-05-11 17:50:00 +00:00

Files

Nithya V S 6e9defe1b5 Developed AVX512 based "sup" kernels for SGEMM

- Only for RRR case, var2m kernels are added
- Main kernel is of 12x32 (AVX512), associated fringe kernels of
	- 8x32, 4x32, 2x32, 1x32 (AVX512)
	- 12x16, 8x16, 4x16, 2x16, 1x16 (AVX512)
	- 12x8, 8x8 (AVX2)
	- 12x4, 8x4 (SSE4)
	- 12x2, 8x2 (SSE4)
	- existing AVX2/SSE4 kernels are used for other fringe
	  cases
- Currently, these kernels are not invoked in zen4 path
- Once all AVX512 kernels (n and rd) are done, invoke all of them
  together in zen4 config

AMD-Internal: [CPUPL-2801]

Change-Id: I7a206fee9151e92319d83dcc5f3eed61d3bf1196

2022-12-16 10:18:09 +05:30

DAMAXV AXX512 micro kernel bug fix.

2022-06-13 10:52:53 +05:30

Developed AVX512 based "sup" kernels for SGEMM

2022-12-16 10:18:09 +05:30

bli_kernels_zen4.h

Developed AVX512 based "sup" kernels for SGEMM

2022-12-16 10:18:09 +05:30

CMakeLists.txt

DTRSM Native path AVX 512 kernels are developed

2022-10-01 15:58:24 +00:00

README

Added support for zen4 architecture

2021-11-23 10:29:15 +05:30

README

Currently there are no zen4 specific kernels, however, this folder is required for the the build system.