mirror of
https://github.com/amd/blis.git
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b846059bcf
Details: -Added SIMD kernels for SWAPV for both single and double precisions. -Modified cntx_init file for zen and zen2 configurations to choose opt kernels for SWAPV. -Added test_swapv.c in test folder. -Modified test/Makefile to include test_swapv.c Change-Id: Ida786eec722e634aee0dacdd51c327823c80f01a Signed-off-by: Meghana Vankadari <Meghana.Vankadari@amd.com> AMD-Internal: [CPUPL-847]
138 lines
5.3 KiB
C
138 lines
5.3 KiB
C
/*
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BLIS
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An object-based framework for developing high-performance BLAS-like
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libraries.
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Copyright (C) 2014, The University of Texas at Austin
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Copyright (C) 2020, Advanced Micro Devices, Inc.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name(s) of the copyright holder(s) nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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// -- level-1v --
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// amaxv (intrinsics)
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AMAXV_KER_PROT( float, s, amaxv_zen_int )
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AMAXV_KER_PROT( double, d, amaxv_zen_int )
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// axpyv (intrinsics)
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AXPYV_KER_PROT( float, s, axpyv_zen_int )
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AXPYV_KER_PROT( double, d, axpyv_zen_int )
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// axpyv (intrinsics unrolled x10)
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AXPYV_KER_PROT( float, s, axpyv_zen_int10 )
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AXPYV_KER_PROT( double, d, axpyv_zen_int10 )
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// dotv (intrinsics)
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DOTV_KER_PROT( float, s, dotv_zen_int )
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DOTV_KER_PROT( double, d, dotv_zen_int )
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// dotv (intrinsics, unrolled x10)
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DOTV_KER_PROT( float, s, dotv_zen_int10 )
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DOTV_KER_PROT( double, d, dotv_zen_int10 )
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// dotxv (intrinsics)
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DOTXV_KER_PROT( float, s, dotxv_zen_int )
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DOTXV_KER_PROT( double, d, dotxv_zen_int )
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// scalv (intrinsics)
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SCALV_KER_PROT( float, s, scalv_zen_int )
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SCALV_KER_PROT( double, d, scalv_zen_int )
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// scalv (intrinsics unrolled x10)
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SCALV_KER_PROT( float, s, scalv_zen_int10 )
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SCALV_KER_PROT( double, d, scalv_zen_int10 )
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// swapv (intrinsics)
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SWAPV_KER_PROT(float, s, swapv_zen_int8 )
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SWAPV_KER_PROT(double, d, swapv_zen_int8 )
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// -- level-1f --
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// axpyf (intrinsics)
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AXPYF_KER_PROT( float, s, axpyf_zen_int_8 )
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AXPYF_KER_PROT( double, d, axpyf_zen_int_8 )
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// dotxf (intrinsics)
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DOTXF_KER_PROT( float, s, dotxf_zen_int_8 )
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DOTXF_KER_PROT( double, d, dotxf_zen_int_8 )
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// -- level-3 sup --------------------------------------------------------------
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// semmsup_rv
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//GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_6x16 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_5x16 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_4x16 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_3x16 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_2x16 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_1x16 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_6x8 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_5x8 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_4x8 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_3x8 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_2x8 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_1x8 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_6x4 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_5x4 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_4x4 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_3x4 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_2x4 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_1x4 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_6x2 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_5x2 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_4x2 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_3x2 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_2x2 )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_1x2 )
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GEMMSUP_KER_PROT( float, s, gemmsup_r_zen_ref_6x1 )
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GEMMSUP_KER_PROT( float, s, gemmsup_r_zen_ref_5x1 )
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GEMMSUP_KER_PROT( float, s, gemmsup_r_zen_ref_4x1 )
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GEMMSUP_KER_PROT( float, s, gemmsup_r_zen_ref_3x1 )
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GEMMSUP_KER_PROT( float, s, gemmsup_r_zen_ref_2x1 )
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GEMMSUP_KER_PROT( float, s, gemmsup_r_zen_ref_1x1 )
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// gemmsup_rv (mkernel in m dim)
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_6x16m )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_6x8m )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_6x4m )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_6x2m )
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// gemmsup_rv (mkernel in n dim)
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_6x16n )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_5x16n )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_4x16n )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_3x16n )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_2x16n )
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GEMMSUP_KER_PROT( float, s, gemmsup_rv_zen_asm_1x16n )
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