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- The AVX512 SGEMM SUP rv m and n kernels did not accomodate for the use of panel strides in case of packed matrices, thus resulting in incorrect matrix strides when packing was explicitly enabled using BLIS_PACK_A=1, BLIS_PACK_B=1 or both. - The kernels are updated to use panel strides for traversing both A and B matrix buffers accurately. [AMD-Internal]: CPUPL-3673 Change-Id: I4341ed7e1e1419cc3e2063b06f278edcb9145adb