Shubham Sharma. be6fbadd95 BlockSize Tuning for ZEN4 and ZEN5 ...

- Enabled dynamic blocksizes for DGEMM in ZEN4 and ZEN5 systems.
- MC, KC and NC are dynamically selected at runtime for DGEMM native.
- A local copy of cntx is created and blocksizes are updated in the local cntx.
- Updated threshold for picking DGEMM SUP kernel for ZEN4.

AMD-Internal: [CPUPL-5912]
Change-Id: Ic12a1a48bfa59af26cc17ccfa47a2a33fadde1f6

2024-11-29 03:19:16 -05:00

..

0

CMake: Adding new portable CMake system.

2023-11-09 15:49:45 +05:30

1

Framework enhancements for ?AXPBYV APIs

2024-07-18 10:06:31 -04:00

1d

CMake: Adding new portable CMake system.

2023-11-09 15:49:45 +05:30

1f

CMake: Adding new portable CMake system.

2023-11-09 15:49:45 +05:30

1m

Enabled DGEMM row major kernel for ZEN4

2024-11-29 08:18:48 +00:00

2

Tiny size optimization for DTRSV var2

2024-08-20 00:40:25 -04:00

3

BlockSize Tuning for ZEN4 and ZEN5

2024-11-29 03:19:16 -05:00

base

Bug Fix: When calculating number of threads for level1 APIs when BLIS_IC_* or BLIS_JC_* are set

2024-08-29 05:42:03 -04:00

compat

Added CBLAS wrappers for complex precision ?ROT and ?ROTG APIs

2024-09-19 08:49:46 -04:00

include

SCALV alpha=zero BLAS compliance

2024-09-16 07:10:28 -04:00

thread

OpenMP barrier overhead bug fix

2024-11-22 15:36:30 +05:30

util

Export full set of _blis_impl interfaces

2024-09-03 04:13:06 -04:00

CMakeLists.txt

Code cleanup: Copyright notices

2024-08-05 15:35:08 -04:00